Adding x64 simd assembler support.

src/x64/assembler-x64-inl.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_X64_ASSEMBLER_X64_INL_H_
 #define V8_X64_ASSEMBLER_X64_INL_H_
 
 #include "src/x64/assembler-x64.h"
 
 #include "src/base/cpu.h"
@@ skipping 161 matching lines @@
 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) {
   byte rex_bits =  (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
   if (rex_bits != 0) emit(0x40 | rex_bits);
 }
 
 
 void Assembler::emit_optional_rex_32(Register rm_reg) {
   if (rm_reg.high_bit()) emit(0x41);
 }
 
-
-void Assembler::emit_optional_rex_32(XMMRegister rm_reg) {
-  if (rm_reg.high_bit()) emit(0x41);
+void Assembler::emit_optional_rex_32(XMMRegister reg) {
+  byte rex_bits = (reg.code() & 0x8) >> 1;
+  if (rex_bits != 0) emit(0x40 | rex_bits);
 }
 
-
 void Assembler::emit_optional_rex_32(const Operand& op) {
   if (op.rex_ != 0) emit(0x40 | op.rex_);
 }
 
 
 // byte 1 of 3-byte VEX
 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
                                 LeadingOpcode m) {
   byte rxb = ~((reg.high_bit() << 2) | rm.high_bit()) << 5;
   emit(rxb | m);
@@ skipping 412 matching lines @@
 void Operand::set_disp64(int64_t disp) {
   DCHECK_EQ(1, len_);
   int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]);
   *p = disp;
   len_ += sizeof(disp);
 }
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_X64_ASSEMBLER_X64_INL_H_