Add two argument SSE shuffle instructions

runtime/vm/assembler_ia32.cc

Index: runtime/vm/assembler_ia32.cc
diff --git a/runtime/vm/assembler_ia32.cc b/runtime/vm/assembler_ia32.cc
index 810efc53bd8f8f038efd23a73b0175a6724290c5..4244adbae28f62606ad5ae19df86c7e0218f9ed5 100644
--- a/runtime/vm/assembler_ia32.cc
+++ b/runtime/vm/assembler_ia32.cc
@@ -756,6 +756,56 @@ void Assembler::reciprocalps(XmmRegister dst) {
 }
 
 
+void Assembler::movhlps(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0x12);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
+void Assembler::movlhps(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0x16);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
+void Assembler::unpcklps(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0x14);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
+void Assembler::unpckhps(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0x15);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
+void Assembler::unpcklpd(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x66);
+  EmitUint8(0x0F);
+  EmitUint8(0x14);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
+void Assembler::unpckhpd(XmmRegister dst, XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x66);
+  EmitUint8(0x0F);
+  EmitUint8(0x15);
+  EmitXmmRegisterOperand(dst, src);
+}
+
+
 void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) {
   // Load 32-bit immediate value into tmp1.
   movl(tmp1, imm);