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Issue 19940005: Add two argument SSE shuffle instructions (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Created 7 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/heap.h" 9 #include "vm/heap.h"
10 #include "vm/memory_region.h" 10 #include "vm/memory_region.h"
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832 832
833 void Assembler::reciprocalps(XmmRegister dst) { 833 void Assembler::reciprocalps(XmmRegister dst) {
834 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 834 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
835 EmitREX_RB(dst, dst); 835 EmitREX_RB(dst, dst);
836 EmitUint8(0x0F); 836 EmitUint8(0x0F);
837 EmitUint8(0x53); 837 EmitUint8(0x53);
838 EmitXmmRegisterOperand(dst & 7, dst); 838 EmitXmmRegisterOperand(dst & 7, dst);
839 } 839 }
840 840
841 841
842 void Assembler::movhlps(XmmRegister dst, XmmRegister src) {
843 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
844 EmitREX_RB(dst, src);
845 EmitUint8(0x0F);
846 EmitUint8(0x12);
847 EmitXmmRegisterOperand(dst & 7, src);
848 }
849
850
851 void Assembler::movlhps(XmmRegister dst, XmmRegister src) {
852 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
853 EmitREX_RB(dst, src);
854 EmitUint8(0x0F);
855 EmitUint8(0x16);
856 EmitXmmRegisterOperand(dst & 7, src);
857 }
858
859
860 void Assembler::unpcklps(XmmRegister dst, XmmRegister src) {
861 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
862 EmitREX_RB(dst, src);
863 EmitUint8(0x0F);
864 EmitUint8(0x14);
865 EmitXmmRegisterOperand(dst & 7, src);
866 }
867
868
869 void Assembler::unpckhps(XmmRegister dst, XmmRegister src) {
870 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
871 EmitREX_RB(dst, src);
872 EmitUint8(0x0F);
873 EmitUint8(0x15);
874 EmitXmmRegisterOperand(dst & 7, src);
875 }
876
877
878 void Assembler::unpcklpd(XmmRegister dst, XmmRegister src) {
879 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
880 EmitUint8(0x66);
881 EmitREX_RB(dst, src);
882 EmitUint8(0x0F);
883 EmitUint8(0x14);
884 EmitXmmRegisterOperand(dst & 7, src);
885 }
886
887
888 void Assembler::unpckhpd(XmmRegister dst, XmmRegister src) {
889 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
890 EmitUint8(0x66);
891 EmitREX_RB(dst, src);
892 EmitUint8(0x0F);
893 EmitUint8(0x15);
894 EmitXmmRegisterOperand(dst & 7, src);
895 }
896
897
842 void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) { 898 void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) {
843 // Load 32-bit immediate value into tmp1. 899 // Load 32-bit immediate value into tmp1.
844 movl(tmp1, imm); 900 movl(tmp1, imm);
845 // Move value from tmp1 into dst. 901 // Move value from tmp1 into dst.
846 movd(dst, tmp1); 902 movd(dst, tmp1);
847 // Broadcast low lane into other three lanes. 903 // Broadcast low lane into other three lanes.
848 shufps(dst, dst, Immediate(0x0)); 904 shufps(dst, dst, Immediate(0x0));
849 } 905 }
850 906
851 907
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2545 2601
2546 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2602 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2547 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 2603 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
2548 return xmm_reg_names[reg]; 2604 return xmm_reg_names[reg];
2549 } 2605 }
2550 2606
2551 2607
2552 } // namespace dart 2608 } // namespace dart
2553 2609
2554 #endif // defined TARGET_ARCH_X64 2610 #endif // defined TARGET_ARCH_X64
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