Subzero, MIPS32: Introduction of floating point registers

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 166 matching lines @@
       auto *Instr = Context.insert<InstMIPS32Mov>(Dest, Src0);
       if (Instr->isMultiDest()) {
         // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
         // fake-def for Instr.DestHi here.
         assert(llvm::isa<Variable64On32>(Dest));
         Context.insert<InstFakeDef>(Instr->getDestHi());
       }
     }
   }
 
+  void _mfc1(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Mfc1>(Dest, Src);
+  }
+
   void _mfhi(Variable *Dest, Operand *Src) {
     Context.insert<InstMIPS32Mfhi>(Dest, Src);
   }
 
   void _mflo(Variable *Dest, Operand *Src) {
     Context.insert<InstMIPS32Mflo>(Dest, Src);
   }
 
+  void _mtc1(Variable *Dest, Variable *Src) {
+    Context.insert<InstMIPS32Mtc1>(Dest, Src);
+  }
+
   void _mthi(Variable *Dest, Operand *Src) {
     Context.insert<InstMIPS32Mthi>(Dest, Src);
   }
 
   void _mtlo(Variable *Dest, Operand *Src) {
     Context.insert<InstMIPS32Mtlo>(Dest, Src);
   }
 
   void _mul(Variable *Dest, Variable *Src0, Variable *Src1) {
     Context.insert<InstMIPS32Mul>(Dest, Src0, Src1);
@@ skipping 215 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H