| Index: src/IceConditionCodesMIPS32.h
|
| diff --git a/src/IceConditionCodesARM32.h b/src/IceConditionCodesMIPS32.h
|
| similarity index 60%
|
| copy from src/IceConditionCodesARM32.h
|
| copy to src/IceConditionCodesMIPS32.h
|
| index 1ad3dbd05470fcd15d9ad8e5618c5382c1b7ddea..a03a0ae59ef9e864bf916597c59bff1a3cb79458 100644
|
| --- a/src/IceConditionCodesARM32.h
|
| +++ b/src/IceConditionCodesMIPS32.h
|
| @@ -1,4 +1,4 @@
|
| -//===- subzero/src/IceConditionCodesARM32.h - Condition Codes ---*- C++ -*-===//
|
| +//===- subzero/src/IceConditionCodesMIPS32.h - Condition Codes --*- C++ -*-===//
|
| //
|
| // The Subzero Code Generator
|
| //
|
| @@ -8,29 +8,29 @@
|
| //===----------------------------------------------------------------------===//
|
| ///
|
| /// \file
|
| -/// \brief Declares the condition codes for ARM32.
|
| +/// \brief Declares the condition codes for MIPS32.
|
| ///
|
| //===----------------------------------------------------------------------===//
|
|
|
| -#ifndef SUBZERO_SRC_ICECONDITIONCODESARM32_H
|
| -#define SUBZERO_SRC_ICECONDITIONCODESARM32_H
|
| +#ifndef SUBZERO_SRC_ICECONDITIONCODESMIPS32_H
|
| +#define SUBZERO_SRC_ICECONDITIONCODESMIPS32_H
|
|
|
| #include "IceDefs.h"
|
| -#include "IceInstARM32.def"
|
| +#include "IceInstMIPS32.def"
|
|
|
| namespace Ice {
|
|
|
| -class CondARM32 {
|
| - CondARM32() = delete;
|
| - CondARM32(const CondARM32 &) = delete;
|
| - CondARM32 &operator=(const CondARM32 &) = delete;
|
| +class CondMIPS32 {
|
| + CondMIPS32() = delete;
|
| + CondMIPS32(const CondMIPS32 &) = delete;
|
| + CondMIPS32 &operator=(const CondMIPS32 &) = delete;
|
|
|
| public:
|
| /// An enum of codes used for conditional instructions. The enum value should
|
| /// match the value used to encode operands in binary instructions.
|
| enum Cond {
|
| -#define X(tag, encode, opp, emit) tag = encode,
|
| - ICEINSTARM32COND_TABLE
|
| +#define X(tag, opp, emit) tag,
|
| + ICEINSTMIPS32COND_TABLE
|
| #undef X
|
| };
|
|
|
| @@ -41,4 +41,4 @@ public:
|
|
|
| } // end of namespace Ice
|
|
|
| -#endif // SUBZERO_SRC_ICECONDITIONCODESARM32_H
|
| +#endif // SUBZERO_SRC_ICECONDITIONCODESMIPS32_H
|
|
|