Index: src/IceConditionCodesMIPS32.h |
diff --git a/src/IceConditionCodesARM32.h b/src/IceConditionCodesMIPS32.h |
similarity index 62% |
copy from src/IceConditionCodesARM32.h |
copy to src/IceConditionCodesMIPS32.h |
index 1ad3dbd05470fcd15d9ad8e5618c5382c1b7ddea..129c17efcdcaaa4d776abfbc5d338c6eb4b2c7d8 100644 |
--- a/src/IceConditionCodesARM32.h |
+++ b/src/IceConditionCodesMIPS32.h |
@@ -1,4 +1,5 @@ |
-//===- subzero/src/IceConditionCodesARM32.h - Condition Codes ---*- C++ -*-===// |
+//===- subzero/src/IceConditionCodesMIPS32.h - Condition Codes ---*- C++ |
Jim Stichnoth
2016/05/19 15:03:40
Fix clang-format's line wrapping - probably change
sagar.thakur
2016/05/23 18:30:25
Done.
|
+//-*-===// |
// |
// The Subzero Code Generator |
// |
@@ -8,29 +9,29 @@ |
//===----------------------------------------------------------------------===// |
/// |
/// \file |
-/// \brief Declares the condition codes for ARM32. |
+/// \brief Declares the condition codes for MIPS32. |
/// |
//===----------------------------------------------------------------------===// |
-#ifndef SUBZERO_SRC_ICECONDITIONCODESARM32_H |
-#define SUBZERO_SRC_ICECONDITIONCODESARM32_H |
+#ifndef SUBZERO_SRC_ICECONDITIONCODESMIPS32_H |
+#define SUBZERO_SRC_ICECONDITIONCODESMIPS32_H |
#include "IceDefs.h" |
-#include "IceInstARM32.def" |
+#include "IceInstMIPS32.def" |
namespace Ice { |
-class CondARM32 { |
- CondARM32() = delete; |
- CondARM32(const CondARM32 &) = delete; |
- CondARM32 &operator=(const CondARM32 &) = delete; |
+class CondMIPS32 { |
+ CondMIPS32() = delete; |
+ CondMIPS32(const CondMIPS32 &) = delete; |
+ CondMIPS32 &operator=(const CondMIPS32 &) = delete; |
public: |
/// An enum of codes used for conditional instructions. The enum value should |
/// match the value used to encode operands in binary instructions. |
enum Cond { |
#define X(tag, encode, opp, emit) tag = encode, |
- ICEINSTARM32COND_TABLE |
+ ICEINSTMIPS32COND_TABLE |
#undef X |
}; |
@@ -41,4 +42,4 @@ public: |
} // end of namespace Ice |
-#endif // SUBZERO_SRC_ICECONDITIONCODESARM32_H |
+#endif // SUBZERO_SRC_ICECONDITIONCODESMIPS32_H |