Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(6)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: tests_lit/llvm2ice_tests/cond-branch.ll

Issue 1993773004: [Subzero][MIPS32] Addition of bool folding machinery and implementation of conditional branches (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« src/IceInstMIPS32.h ('K') | « src/IceTargetLoweringMIPS32.cpp ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
(Empty)
1 ; Tests for conditional branch instructions
2
3 ; RUN: %if --need=allow_dump --need=target_MIPS32 --command %p2i \
4 ; RUN: --filetype=asm --target mips32 -i %s --args -O2 --skip-unimplemented \
5 ; RUN: -allow-externally-defined-symbols \
6 ; RUN: | %if --need=allow_dump --need=target_MIPS32 --command FileCheck %s \
7 ; RUN: --check-prefix=COMMON --check-prefix=MIPS32
8
9 ; RUN: %if --need=allow_dump --need=target_MIPS32 --command %p2i \
10 ; RUN: --filetype=asm --target mips32 -i %s --args -Om1 --skip-unimplemented \
11 ; RUN: -allow-externally-defined-symbols \
12 ; RUN: | %if --need=allow_dump --need=target_MIPS32 --command FileCheck %s \
13 ; RUN: --check-prefix=COMMON --check-prefix=MIPS32-OM1
14
15 define internal i32 @cond_br_eq(i32 %arg1, i32 %arg2) {
16 entry:
17 %cmp1 = icmp eq i32 %arg1, %arg2
18 br i1 %cmp1, label %branch1, label %branch2
19 branch1:
20 ret i32 1
21 branch2:
22 ret i32 2
23 }
24 ; COMMON-LABEL: cond_br_eq
25 ; MIPS32: bne
26 ; MIPS32-OM1: xor
27 ; MIPS32-OM1: sltiu {{.*}}, {{.*}}, 1
28 ; MIPS32-OM1: beqz
29
30 define internal i32 @cond_br_ne(i32 %arg1, i32 %arg2) {
31 entry:
32 %cmp1 = icmp ne i32 %arg1, %arg2
33 br i1 %cmp1, label %branch1, label %branch2
34 branch1:
35 ret i32 1
36 branch2:
37 ret i32 2
38 }
39 ; COMMON-LABEL: cond_br_ne
40 ; MIPS32: beq
41 ; MIPS32-OM1: xor
42 ; MIPS32-OM1: sltu {{.*}}, $zero, {{.*}}
43 ; MIPS32-OM1: beqz
44
45 define internal i32 @cond_br_slt(i32 %arg1, i32 %arg2) {
46 entry:
47 %cmp1 = icmp slt i32 %arg1, %arg2
48 br i1 %cmp1, label %branch1, label %branch2
49 branch1:
50 ret i32 1
51 branch2:
52 ret i32 2
53 }
54 ; COMMON-LABEL: cond_br_slt
55 ; MIPS32: slt
56 ; MIPS32: beqz
57 ; MIPS32-OM1: slt
58 ; MIPS32-OM1: beqz
59
60 define internal i32 @cond_br_sle(i32 %arg1, i32 %arg2) {
61 entry:
62 %cmp1 = icmp sle i32 %arg1, %arg2
63 br i1 %cmp1, label %branch1, label %branch2
64 branch1:
65 ret i32 1
66 branch2:
67 ret i32 2
68 }
69 ; COMMON-LABEL: cond_br_sle
70 ; MIPS32: slt
71 ; MIPS32: bnez
72 ; MIPS32-OM1: slt
73 ; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
74 ; MIPS32-OM1: beqz
75
76 define internal i32 @cond_br_sgt(i32 %arg1, i32 %arg2) {
77 entry:
78 %cmp1 = icmp sgt i32 %arg1, %arg2
79 br i1 %cmp1, label %branch1, label %branch2
80 branch1:
81 ret i32 1
82 branch2:
83 ret i32 2
84 }
85 ; COMMON-LABEL: cond_br_sgt
86 ; MIPS32: slt
87 ; MIPS32: beqz
88 ; MIPS32-OM1: slt
89 ; MIPS32-OM1: beqz
90
91 define internal i32 @cond_br_sge(i32 %arg1, i32 %arg2) {
92 entry:
93 %cmp1 = icmp sge i32 %arg1, %arg2
94 br i1 %cmp1, label %branch1, label %branch2
95 branch1:
96 ret i32 1
97 branch2:
98 ret i32 2
99 }
100 ; COMMON-LABEL: cond_br_sge
101 ; MIPS32: slt
102 ; MIPS32: bnez
103 ; MIPS32-OM1: slt
104 ; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
105 ; MIPS32-OM1: beqz
106
107 define internal i32 @cond_br_ugt(i32 %arg1, i32 %arg2) {
108 entry:
109 %cmp1 = icmp ugt i32 %arg1, %arg2
110 br i1 %cmp1, label %branch1, label %branch2
111 branch1:
112 ret i32 1
113 branch2:
114 ret i32 2
115 }
116 ; COMMON-LABEL: cond_br_ugt
117 ; MIPS32: sltu
118 ; MIPS32: beqz
119 ; MIPS32-OM1: sltu
120 ; MIPS32-OM1: beqz
121
122 define internal i32 @cond_br_uge(i32 %arg1, i32 %arg2) {
123 entry:
124 %cmp1 = icmp uge i32 %arg1, %arg2
125 br i1 %cmp1, label %branch1, label %branch2
126 branch1:
127 ret i32 1
128 branch2:
129 ret i32 2
130 }
131 ; COMMON-LABEL: cond_br_uge
132 ; MIPS32: sltu
133 ; MIPS32: bnez
134 ; MIPS32-OM1: sltu
135 ; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
136 ; MIPS32-OM1: beqz
137
138 define internal i32 @cond_br_ult(i32 %arg1, i32 %arg2) {
139 entry:
140 %cmp1 = icmp ult i32 %arg1, %arg2
141 br i1 %cmp1, label %branch1, label %branch2
142 branch1:
143 ret i32 1
144 branch2:
145 ret i32 2
146 }
147 ; COMMON-LABEL: cond_br_ult
148 ; MIPS32: sltu
149 ; MIPS32: beqz
150 ; MIPS32-OM1: sltu
151 ; MIPS32-OM1: beqz
152
153 define internal i32 @cond_br_ule(i32 %arg1, i32 %arg2) {
154 entry:
155 %cmp1 = icmp ule i32 %arg1, %arg2
156 br i1 %cmp1, label %branch1, label %branch2
157 branch1:
158 ret i32 1
159 branch2:
160 ret i32 2
161 }
162 ; COMMON-LABEL: cond_br_ule
163 ; MIPS32: sltu
164 ; MIPS32: bnez
165 ; MIPS32-OM1: sltu
166 ; MIPS32-OM1: xori {{.*}}, {{.*}}, 1
167 ; MIPS32-OM1: beqz
OLDNEW
« src/IceInstMIPS32.h ('K') | « src/IceTargetLoweringMIPS32.cpp ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698