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Side by Side Diff: src/IceInstMIPS32.def

Issue 1993773004: [Subzero][MIPS32] Addition of bool folding machinery and implementation of conditional branches (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 6 months ago
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1 //===- subzero/src/IceInstMIPS32.def - X-Macros for MIPS32 insts --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.def - X-Macros for MIPS insts --*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines properties of MIPS32 instructions in the form of x-macros. 10 // This file defines properties of MIPS32 instructions in the form of x-macros.
11 // 11 //
(...skipping 152 matching lines...) Expand 10 before | Expand all | Expand 10 after
164 //#define X(val, encode, name, scratch, preserved, stackptr, frameptr, 164 //#define X(val, encode, name, scratch, preserved, stackptr, frameptr,
165 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) 165 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
166 #define REGMIPS32_TABLE_BOUNDS \ 166 #define REGMIPS32_TABLE_BOUNDS \
167 /* val, init */ \ 167 /* val, init */ \
168 X(Reg_GPR_First, = Reg_ZERO) \ 168 X(Reg_GPR_First, = Reg_ZERO) \
169 X(Reg_GPR_Last, = Reg_HI) \ 169 X(Reg_GPR_Last, = Reg_HI) \
170 X(Reg_I64PAIR_First, = Reg_V0V1) \ 170 X(Reg_I64PAIR_First, = Reg_V0V1) \
171 X(Reg_I64PAIR_Last, = Reg_LOHI) \ 171 X(Reg_I64PAIR_Last, = Reg_LOHI) \
172 //define X(val, init) 172 //define X(val, init)
173 173
174 // TODO(reed kotler): add condition code tables, etc. 174 #define ICEINSTMIPS32COND_TABLE \
175 175 /* enum value, opposite, emit */ \
176 X(EQ, NE, "eq") /* equal */ \
177 X(NE, EQ, "ne") /* not equal */ \
178 X(EQZ, NEZ, "eqz") /* signed equal to zero */ \
179 X(NEZ, EQZ, "nez") /* signed not equal to zero */ \
180 X(GEZ, LTZ, "gez") /* signed greater than or equal to zero */ \
181 X(LTZ, GEZ, "ltz") /* signed less than to zero */ \
182 X(GTZ, LEZ, "gtz") /* signed greater than to zero */ \
183 X(LEZ, GTZ, "lez") /* signed less than or equal to zero */ \
184 X(AL, kNone, "") /* always (unconditional) */ \
185 X(kNone, kNone, "??") /* special condition / none */
186 //#define X(tag, opp, emit)
176 187
177 #endif // SUBZERO_SRC_ICEINSTMIPS32_DEF 188 #endif // SUBZERO_SRC_ICEINSTMIPS32_DEF
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