[Subzero][MIPS32] Addition of bool folding machinery and implementation of conditional branches

src/IceConditionCodesMIPS32.h

-//===- subzero/src/IceConditionCodesARM32.h - Condition Codes ---*- C++ -*-===//
+//===- subzero/src/IceConditionCodesMIPS32.h - Condition Codes --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
-/// \brief Declares the condition codes for ARM32.
+/// \brief Declares the condition codes for MIPS32.
 ///
 //===----------------------------------------------------------------------===//
 
-#ifndef SUBZERO_SRC_ICECONDITIONCODESARM32_H
-#define SUBZERO_SRC_ICECONDITIONCODESARM32_H
+#ifndef SUBZERO_SRC_ICECONDITIONCODESMIPS32_H
+#define SUBZERO_SRC_ICECONDITIONCODESMIPS32_H
 
 #include "IceDefs.h"
-#include "IceInstARM32.def"
+#include "IceInstMIPS32.def"
 
 namespace Ice {
 
-class CondARM32 {
-  CondARM32() = delete;
-  CondARM32(const CondARM32 &) = delete;
-  CondARM32 &operator=(const CondARM32 &) = delete;
+class CondMIPS32 {
+  CondMIPS32() = delete;
+  CondMIPS32(const CondMIPS32 &) = delete;
+  CondMIPS32 &operator=(const CondMIPS32 &) = delete;
 
 public:
   /// An enum of codes used for conditional instructions. The enum value should
   /// match the value used to encode operands in binary instructions.
   enum Cond {
-#define X(tag, encode, opp, emit) tag = encode,
-    ICEINSTARM32COND_TABLE
+#define X(tag, opp, emit) tag,
+    ICEINSTMIPS32COND_TABLE
 #undef X
   };
 
   static bool isDefined(Cond C) { return C != kNone; }
 
   static bool isUnconditional(Cond C) { return !isDefined(C) || C == AL; }
 };
 
 } // end of namespace Ice
 
-#endif // SUBZERO_SRC_ICECONDITIONCODESARM32_H
+#endif // SUBZERO_SRC_ICECONDITIONCODESMIPS32_H