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Side by Side Diff: src/IceInstMIPS32.h

Issue 1993773004: [Subzero][MIPS32] Addition of bool folding machinery and implementation of conditional branches (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 7 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// \brief Declares the InstMIPS32 and OperandMIPS32 classes and their 11 /// \brief Declares the InstMIPS32 and OperandMIPS32 classes and their
12 /// subclasses. 12 /// subclasses.
13 /// 13 ///
14 /// This represents the machine instructions and operands used for MIPS32 code 14 /// This represents the machine instructions and operands used for MIPS32 code
15 /// selection. 15 /// selection.
16 /// 16 ///
17 //===----------------------------------------------------------------------===// 17 //===----------------------------------------------------------------------===//
18 18
19 #ifndef SUBZERO_SRC_ICEINSTMIPS32_H 19 #ifndef SUBZERO_SRC_ICEINSTMIPS32_H
20 #define SUBZERO_SRC_ICEINSTMIPS32_H 20 #define SUBZERO_SRC_ICEINSTMIPS32_H
21 21
22 #include "IceConditionCodesMIPS32.h"
22 #include "IceDefs.h" 23 #include "IceDefs.h"
23 #include "IceInst.h" 24 #include "IceInst.h"
24 #include "IceInstMIPS32.def" 25 #include "IceInstMIPS32.def"
25 #include "IceOperand.h" 26 #include "IceOperand.h"
26 27
27 namespace Ice { 28 namespace Ice {
28 namespace MIPS32 { 29 namespace MIPS32 {
29 30
30 class TargetMIPS32; 31 class TargetMIPS32;
31 32
(...skipping 301 matching lines...) Expand 10 before | Expand all | Expand 10 after
333 InstMIPS32Br() = delete; 334 InstMIPS32Br() = delete;
334 InstMIPS32Br(const InstMIPS32Br &) = delete; 335 InstMIPS32Br(const InstMIPS32Br &) = delete;
335 InstMIPS32Br &operator=(const InstMIPS32Br &) = delete; 336 InstMIPS32Br &operator=(const InstMIPS32Br &) = delete;
336 337
337 public: 338 public:
338 /// Create an unconditional branch to a node. 339 /// Create an unconditional branch to a node.
339 static InstMIPS32Br *create(Cfg *Func, CfgNode *Target) { 340 static InstMIPS32Br *create(Cfg *Func, CfgNode *Target) {
340 constexpr CfgNode *NoCondTarget = nullptr; 341 constexpr CfgNode *NoCondTarget = nullptr;
341 constexpr InstMIPS32Label *NoLabel = nullptr; 342 constexpr InstMIPS32Label *NoLabel = nullptr;
342 return new (Func->allocate<InstMIPS32Br>()) 343 return new (Func->allocate<InstMIPS32Br>())
343 InstMIPS32Br(Func, NoCondTarget, Target, NoLabel); 344 InstMIPS32Br(Func, NoCondTarget, Target, NoLabel, CondMIPS32::AL);
344 } 345 }
346
347 /// Create a conditional branch to the false node.
348 static InstMIPS32Br *create(Cfg *Func, CfgNode *TargetTrue,
349 CfgNode *TargetFalse, Operand *Src0,
350 Operand *Src1, CondMIPS32::Cond Cond) {
351 constexpr InstMIPS32Label *NoLabel = nullptr;
352 return new (Func->allocate<InstMIPS32Br>())
353 InstMIPS32Br(Func, TargetTrue, TargetFalse, Src0, Src1, NoLabel, Cond);
354 }
355
356 static InstMIPS32Br *create(Cfg *Func, CfgNode *TargetTrue,
357 CfgNode *TargetFalse, Operand *Src0,
358 CondMIPS32::Cond Cond) {
359 constexpr InstMIPS32Label *NoLabel = nullptr;
360 return new (Func->allocate<InstMIPS32Br>())
361 InstMIPS32Br(Func, TargetTrue, TargetFalse, Src0, NoLabel, Cond);
362 }
363
345 const CfgNode *getTargetTrue() const { return TargetTrue; } 364 const CfgNode *getTargetTrue() const { return TargetTrue; }
346 const CfgNode *getTargetFalse() const { return TargetFalse; } 365 const CfgNode *getTargetFalse() const { return TargetFalse; }
347 366
348 bool isUnconditionalBranch() const override { return true; } 367 bool isUnconditionalBranch() const override {
368 return Predicate == CondMIPS32::AL;
369 }
349 bool repointEdges(CfgNode *OldNode, CfgNode *NewNode) override { 370 bool repointEdges(CfgNode *OldNode, CfgNode *NewNode) override {
350 (void)OldNode; 371 (void)OldNode;
351 (void)NewNode; 372 (void)NewNode;
352 return true; 373 return true;
353 }; 374 };
354 void emit(const Cfg *Func) const override; 375 void emit(const Cfg *Func) const override;
355 void emitIAS(const Cfg *Func) const override { (void)Func; }; 376 void emitIAS(const Cfg *Func) const override { (void)Func; };
356 void dump(const Cfg *Func) const override { (void)Func; }; 377 void dump(const Cfg *Func) const override;
357 static bool classof(const Inst *Instr) { return isClassof(Instr, Br); } 378 static bool classof(const Inst *Instr) { return isClassof(Instr, Br); }
358 379
359 private: 380 private:
360 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse, 381 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse,
361 const InstMIPS32Label *Label); 382 const InstMIPS32Label *Label, const CondMIPS32::Cond Cond);
383
384 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse,
385 Operand *Src0, const InstMIPS32Label *Label,
386 const CondMIPS32::Cond Cond);
387
388 InstMIPS32Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse,
389 Operand *Src0, Operand *Src1, const InstMIPS32Label *Label,
390 const CondMIPS32::Cond Cond);
362 391
363 const CfgNode *TargetTrue; 392 const CfgNode *TargetTrue;
364 const CfgNode *TargetFalse; 393 const CfgNode *TargetFalse;
365 const InstMIPS32Label *Label; // Intra-block branch target 394 const InstMIPS32Label *Label; // Intra-block branch target
395 const CondMIPS32::Cond Predicate;
366 }; 396 };
367 397
368 class InstMIPS32Call : public InstMIPS32 { 398 class InstMIPS32Call : public InstMIPS32 {
369 InstMIPS32Call() = delete; 399 InstMIPS32Call() = delete;
370 InstMIPS32Call(const InstMIPS32Call &) = delete; 400 InstMIPS32Call(const InstMIPS32Call &) = delete;
371 InstMIPS32Call &operator=(const InstMIPS32Call &) = delete; 401 InstMIPS32Call &operator=(const InstMIPS32Call &) = delete;
372 402
373 public: 403 public:
374 static InstMIPS32Call *create(Cfg *Func, Variable *Dest, 404 static InstMIPS32Call *create(Cfg *Func, Variable *Dest,
375 Operand *CallTarget) { 405 Operand *CallTarget) {
(...skipping 154 matching lines...) Expand 10 before | Expand all | Expand 10 after
530 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 560 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
531 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 561 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
532 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 562 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
533 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 563 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
534 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 564 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
535 565
536 } // end of namespace MIPS32 566 } // end of namespace MIPS32
537 } // end of namespace Ice 567 } // end of namespace Ice
538 568
539 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 569 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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