Index: src/ia32/assembler-ia32.h |
diff --git a/src/ia32/assembler-ia32.h b/src/ia32/assembler-ia32.h |
index b495f7a001d120f3f99d8a6c96897d3febbe3040..f2e7c6cfd44a64ed30c49aa5931c0d91343a9e56 100644 |
--- a/src/ia32/assembler-ia32.h |
+++ b/src/ia32/assembler-ia32.h |
@@ -222,6 +222,7 @@ |
not_sign = positive |
}; |
+ |
// Returns the equivalent of !cc. |
// Negation of the default no_condition (-1) results in a non-default |
// no_condition value (-2). As long as tests for no_condition check |
@@ -357,11 +358,6 @@ |
RelocInfo::INTERNAL_REFERENCE); |
} |
- // Offset from existing memory operand. |
- // The offset is added to existing displacement as 32-bit signed value. |
- // The caller must ensure overflow does not occur. |
- Operand(const Operand& base, int32_t offset); |
- |
static Operand StaticVariable(const ExternalReference& ext) { |
return Operand(reinterpret_cast<int32_t>(ext.address()), |
RelocInfo::EXTERNAL_REFERENCE); |
@@ -967,8 +963,6 @@ |
void ucomiss(XMMRegister dst, const Operand& src); |
void movaps(XMMRegister dst, XMMRegister src); |
void shufps(XMMRegister dst, XMMRegister src, byte imm8); |
- void movups(XMMRegister dst, const Operand& src); |
- void movups(const Operand& dst, XMMRegister src); |
void maxss(XMMRegister dst, XMMRegister src) { maxss(dst, Operand(src)); } |
void maxss(XMMRegister dst, const Operand& src); |
@@ -990,24 +984,6 @@ |
void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); } |
void divps(XMMRegister dst, const Operand& src); |
void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); } |
- void minps(XMMRegister dst, XMMRegister src) { minps(dst, Operand(src)); } |
- void minps(XMMRegister dst, const Operand& src); |
- void maxps(XMMRegister dst, XMMRegister src) { maxps(dst, Operand(src)); } |
- void maxps(XMMRegister dst, const Operand& src); |
- void rcpps(XMMRegister dst, XMMRegister src) { rcpps(dst, Operand(src)); } |
- void rcpps(XMMRegister dst, const Operand& src); |
- void rsqrtps(XMMRegister dst, XMMRegister src) { rsqrtps(dst, Operand(src)); } |
- void rsqrtps(XMMRegister dst, const Operand& src); |
- void sqrtps(XMMRegister dst, XMMRegister src) { sqrtps(dst, Operand(src)); } |
- void sqrtps(XMMRegister dst, const Operand& src); |
- |
- void cmpps(XMMRegister dst, XMMRegister src, int8_t cmp); |
- void cmpeqps(XMMRegister dst, XMMRegister src); |
- void cmpltps(XMMRegister dst, XMMRegister src); |
- void cmpleps(XMMRegister dst, XMMRegister src); |
- void cmpneqps(XMMRegister dst, XMMRegister src); |
- void cmpnltps(XMMRegister dst, XMMRegister src); |
- void cmpnleps(XMMRegister dst, XMMRegister src); |
// SSE2 instructions |
void cvttss2si(Register dst, const Operand& src); |
@@ -1113,30 +1089,6 @@ |
pinsrd(dst, Operand(src), offset); |
} |
void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); |
- |
- void paddd(XMMRegister dst, XMMRegister src) { paddd(dst, Operand(src)); } |
- void paddd(XMMRegister dst, const Operand& src); |
- void psubd(XMMRegister dst, XMMRegister src) { psubd(dst, Operand(src)); } |
- void psubd(XMMRegister dst, const Operand& src); |
- void pmuludq(XMMRegister dst, XMMRegister src) { pmuludq(dst, Operand(src)); } |
- void pmuludq(XMMRegister dst, const Operand& src); |
- void punpackldq(XMMRegister dst, XMMRegister src) { |
- punpackldq(dst, Operand(src)); |
- } |
- void punpackldq(XMMRegister dst, const Operand& src); |
- void cvtps2dq(XMMRegister dst, XMMRegister src) { |
- cvtps2dq(dst, Operand(src)); |
- } |
- void cvtps2dq(XMMRegister dst, const Operand& src); |
- void cvtdq2ps(XMMRegister dst, XMMRegister src) { |
- cvtdq2ps(dst, Operand(src)); |
- } |
- void cvtdq2ps(XMMRegister dst, const Operand& src); |
- |
- // SSE4.1 instructions |
- void insertps(XMMRegister dst, XMMRegister src, byte imm8); |
- void pmulld(XMMRegister dst, XMMRegister src) { pmulld(dst, Operand(src)); } |
- void pmulld(XMMRegister dst, const Operand& src); |
// AVX instructions |
void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { |