Index: src/ia32/disasm-ia32.cc |
diff --git a/src/ia32/disasm-ia32.cc b/src/ia32/disasm-ia32.cc |
index d776365b5959b2d34835bd660506afa8dda48003..aab39eef0858416d021b0cd2e47f00c4e88d8591 100644 |
--- a/src/ia32/disasm-ia32.cc |
+++ b/src/ia32/disasm-ia32.cc |
@@ -1385,7 +1385,20 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
case 0x0F: |
{ byte f0byte = data[1]; |
const char* f0mnem = F0Mnem(f0byte); |
- if (f0byte == 0x18) { |
+ if (f0byte == 0x10) { |
+ data += 2; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("movups %s,", NameOfXMMRegister(regop)); |
+ data += PrintRightXMMOperand(data); |
+ } else if (f0byte == 0x11) { |
+ data += 2; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("movups "); |
+ data += PrintRightXMMOperand(data); |
+ AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
+ } else if (f0byte == 0x18) { |
data += 2; |
int mod, regop, rm; |
get_modrm(*data, &mod, ®op, &rm); |
@@ -1428,28 +1441,16 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
get_modrm(*data, &mod, ®op, &rm); |
AppendToBuffer("ucomiss %s,", NameOfXMMRegister(regop)); |
data += PrintRightXMMOperand(data); |
- } else if (f0byte >= 0x53 && f0byte <= 0x5F) { |
+ } else if (f0byte >= 0x51 && f0byte <= 0x5F) { |
const char* const pseudo_op[] = { |
- "rcpps", |
- "andps", |
- "andnps", |
- "orps", |
- "xorps", |
- "addps", |
- "mulps", |
- "cvtps2pd", |
- "cvtdq2ps", |
- "subps", |
- "minps", |
- "divps", |
- "maxps", |
- }; |
+ "sqrtps", "rsqrtps", "rcpps", "andps", "andnps", |
+ "orps", "xorps", "addps", "mulps", "cvtps2pd", |
+ "cvtdq2ps", "subps", "minps", "divps", "maxps"}; |
data += 2; |
int mod, regop, rm; |
get_modrm(*data, &mod, ®op, &rm); |
- AppendToBuffer("%s %s,", |
- pseudo_op[f0byte - 0x53], |
+ AppendToBuffer("%s %s,", pseudo_op[f0byte - 0x51], |
NameOfXMMRegister(regop)); |
data += PrintRightXMMOperand(data); |
} else if (f0byte == 0x50) { |
@@ -1460,6 +1461,17 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfCPURegister(regop), |
NameOfXMMRegister(rm)); |
data++; |
+ } else if (f0byte == 0xC2) { |
+ // Intel manual 2A, Table 3-11. |
+ data += 2; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ const char* const pseudo_op[] = { |
+ "cmpeqps", "cmpltps", "cmpleps", "cmpunordps", |
+ "cmpneqps", "cmpnltps", "cmpnleps", "cmpordps"}; |
+ AppendToBuffer("%s %s,%s", pseudo_op[data[1]], |
+ NameOfXMMRegister(regop), NameOfXMMRegister(rm)); |
+ data += 2; |
} else if (f0byte== 0xC6) { |
// shufps xmm, xmm/m128, imm8 |
data += 2; |
@@ -1471,6 +1483,12 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfXMMRegister(regop), |
static_cast<int>(imm8)); |
data += 2; |
+ } else if (f0byte == 0x5B) { |
+ data += 2; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("cvtdq2ps %s,", NameOfXMMRegister(rm)); |
+ data += PrintRightXMMOperand(data); |
} else if ((f0byte & 0xF0) == 0x80) { |
data += JumpConditional(data, branch_hint); |
} else if (f0byte == 0xBE || f0byte == 0xBF || f0byte == 0xB6 || |
@@ -1666,6 +1684,13 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfXMMRegister(regop), |
NameOfXMMRegister(rm)); |
data++; |
+ } else if (*data == 0x40) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("pmulld %s,%s", NameOfXMMRegister(regop), |
+ NameOfXMMRegister(rm)); |
+ data += PrintRightXMMOperand(data); |
} else if (*data == 0x2A) { |
// movntdqa |
UnimplementedInstruction(); |
@@ -1702,6 +1727,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfXMMRegister(rm), |
static_cast<int>(imm8)); |
data += 2; |
+ } else if (*data == 0x21) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ int8_t imm8 = static_cast<int8_t>(data[1]); |
+ AppendToBuffer("insertps %s,%s,%d", NameOfXMMRegister(regop), |
+ NameOfXMMRegister(rm), static_cast<int>(imm8)); |
+ data += 2; |
} else if (*data == 0x17) { |
data++; |
int mod, regop, rm; |
@@ -1771,6 +1804,37 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, |
NameOfXMMRegister(regop), |
NameOfXMMRegister(rm)); |
data++; |
+ } else if (*data == 0x5B) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("cvtps2dq %s,%s", NameOfXMMRegister(regop), |
+ NameOfXMMRegister(rm)); |
+ data += PrintRightXMMOperand(data); |
+ } else if (*data == 0x62) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("punpackldq %s,", NameOfXMMRegister(regop)); |
+ data += PrintRightXMMOperand(data); |
+ } else if (*data == 0xF4) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("pmuludq %s,", NameOfXMMRegister(regop)); |
+ data += PrintRightXMMOperand(data); |
+ } else if (*data == 0xFA) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("psubd %s,", NameOfXMMRegister(regop)); |
+ data += PrintRightXMMOperand(data); |
+ } else if (*data == 0xFE) { |
+ data++; |
+ int mod, regop, rm; |
+ get_modrm(*data, &mod, ®op, &rm); |
+ AppendToBuffer("paddd %s,", NameOfXMMRegister(regop)); |
+ data += PrintRightXMMOperand(data); |
} else if (*data == 0x6E) { |
data++; |
int mod, regop, rm; |