Adding ia32 simd assembler changes.

test/cctest/test-disasm-ia32.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 373 matching lines @@
   __ fwait();
   __ frndint();
   __ fninit();
   __ nop();
 
   // SSE instruction
   {
     // Move operation
     __ movaps(xmm0, xmm1);
     __ shufps(xmm0, xmm0, 0x0);
+    __ movups(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ movups(Operand(ebx, ecx, times_4, 10000), xmm1);
     __ cvtsd2ss(xmm0, xmm1);
     __ cvtsd2ss(xmm0, Operand(ebx, ecx, times_4, 10000));
 
     // logic operation
     __ andps(xmm0, xmm1);
     __ andps(xmm0, Operand(ebx, ecx, times_4, 10000));
     __ orps(xmm0, xmm1);
     __ orps(xmm0, Operand(ebx, ecx, times_4, 10000));
     __ xorps(xmm0, xmm1);
     __ xorps(xmm0, Operand(ebx, ecx, times_4, 10000));
@@ skipping 57 matching lines @@
     __ psllq(xmm0, 17);
     __ psllq(xmm0, xmm1);
     __ psrlq(xmm0, 17);
     __ psrlq(xmm0, xmm1);
     __ por(xmm0, xmm1);
 
     __ pcmpeqd(xmm1, xmm0);
 
     __ punpckldq(xmm1, xmm6);
     __ punpckhdq(xmm7, xmm5);
+
+    __ paddd(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ paddd(xmm1, xmm0);
+    __ psubd(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ psubd(xmm1, xmm0);
+    __ pmuludq(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ pmuludq(xmm1, xmm0);
+    __ punpackldq(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ punpackldq(xmm1, xmm0);
+
+    __ cvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ cvtdq2ps(xmm1, xmm0);
+    __ cvtps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ cvtps2dq(xmm1, xmm0);
+  }
+  {
+    __ andps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ andps(xmm1, xmm0);
+    __ xorps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ xorps(xmm1, xmm0);
+    __ orps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ orps(xmm1, xmm0);
+
+    __ addps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ addps(xmm1, xmm0);
+    __ subps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ subps(xmm1, xmm0);
+    __ mulps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ mulps(xmm1, xmm0);
+    __ divps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ divps(xmm1, xmm0);
+    __ minps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ minps(xmm1, xmm0);
+    __ maxps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ maxps(xmm1, xmm0);
+    __ rcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ rcpps(xmm1, xmm0);
+    __ rsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ rsqrtps(xmm1, xmm0);
+    __ sqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
+    __ sqrtps(xmm1, xmm0);
+
+    __ cmpps(xmm1, xmm0, 123);
+    __ cmpeqps(xmm1, xmm0);
+    __ cmpltps(xmm1, xmm0);
+    __ cmpleps(xmm1, xmm0);
+    __ cmpneqps(xmm1, xmm0);
+    __ cmpnltps(xmm1, xmm0);
+    __ cmpnleps(xmm1, xmm0);
   }
 
   // cmov.
   {
     __ cmov(overflow, eax, Operand(eax, 0));
     __ cmov(no_overflow, eax, Operand(eax, 1));
     __ cmov(below, eax, Operand(eax, 2));
     __ cmov(above_equal, eax, Operand(eax, 3));
     __ cmov(equal, eax, Operand(ebx, 0));
     __ cmov(not_equal, eax, Operand(ebx, 1));
     __ cmov(below_equal, eax, Operand(ebx, 2));
     __ cmov(above, eax, Operand(ebx, 3));
     __ cmov(sign, eax, Operand(ecx, 0));
     __ cmov(not_sign, eax, Operand(ecx, 1));
     __ cmov(parity_even, eax, Operand(ecx, 2));
     __ cmov(parity_odd, eax, Operand(ecx, 3));
     __ cmov(less, eax, Operand(edx, 0));
     __ cmov(greater_equal, eax, Operand(edx, 1));
     __ cmov(less_equal, eax, Operand(edx, 2));
     __ cmov(greater, eax, Operand(edx, 3));
   }
 
   {
     if (CpuFeatures::IsSupported(SSE4_1)) {
       CpuFeatureScope scope(&assm, SSE4_1);
       __ pextrd(eax, xmm0, 1);
       __ pinsrd(xmm1, eax, 0);
       __ extractps(eax, xmm1, 0);
+      __ insertps(xmm1, xmm0, 0);
+      __ pmulld(xmm1, Operand(ebx, ecx, times_4, 10000));
+      __ pmulld(xmm1, xmm0);
     }
   }
 
   // AVX instruction
   {
     if (CpuFeatures::IsSupported(AVX)) {
       CpuFeatureScope scope(&assm, AVX);
       __ vaddsd(xmm0, xmm1, xmm2);
       __ vaddsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
       __ vmulsd(xmm0, xmm1, xmm2);
@@ skipping 195 matching lines @@
 #ifdef OBJECT_PRINT
   OFStream os(stdout);
   code->Print(os);
   byte* begin = code->instruction_start();
   byte* end = begin + code->instruction_size();
   disasm::Disassembler::Disassemble(stdout, begin, end);
 #endif
 }
 
 #undef __