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Issue 1990133002: X87: Add cmpxchg and lock instructions to x64 and ia32 {dis,}assemblers. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 7 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 8
9 #if V8_TARGET_ARCH_X87 9 #if V8_TARGET_ARCH_X87
10 10
(...skipping 902 matching lines...) Expand 10 before | Expand all | Expand 10 after
913 case 0xA4: 913 case 0xA4:
914 return "shld"; 914 return "shld";
915 case 0xA5: 915 case 0xA5:
916 return "shld"; 916 return "shld";
917 case 0xAD: 917 case 0xAD:
918 return "shrd"; 918 return "shrd";
919 case 0xAC: 919 case 0xAC:
920 return "shrd"; // 3-operand version. 920 return "shrd"; // 3-operand version.
921 case 0xAB: 921 case 0xAB:
922 return "bts"; 922 return "bts";
923 case 0xB0:
924 return "cmpxchg_b";
925 case 0xB1:
926 return "cmpxchg";
923 case 0xBC: 927 case 0xBC:
924 return "bsf"; 928 return "bsf";
925 case 0xBD: 929 case 0xBD:
926 return "bsr"; 930 return "bsr";
927 default: return NULL; 931 default: return NULL;
928 } 932 }
929 } 933 }
930 934
931 935
932 // Disassembled instruction '*instr' and writes it into 'out_buffer'. 936 // Disassembled instruction '*instr' and writes it into 'out_buffer'.
933 int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer, 937 int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer,
934 byte* instr) { 938 byte* instr) {
935 tmp_buffer_pos_ = 0; // starting to write as position 0 939 tmp_buffer_pos_ = 0; // starting to write as position 0
936 byte* data = instr; 940 byte* data = instr;
937 // Check for hints. 941 // Check for hints.
938 const char* branch_hint = NULL; 942 const char* branch_hint = NULL;
939 // We use these two prefixes only with branch prediction 943 // We use these two prefixes only with branch prediction
940 if (*data == 0x3E /*ds*/) { 944 if (*data == 0x3E /*ds*/) {
941 branch_hint = "predicted taken"; 945 branch_hint = "predicted taken";
942 data++; 946 data++;
943 } else if (*data == 0x2E /*cs*/) { 947 } else if (*data == 0x2E /*cs*/) {
944 branch_hint = "predicted not taken"; 948 branch_hint = "predicted not taken";
945 data++; 949 data++;
950 } else if (*data == 0xF0 /*lock*/) {
951 AppendToBuffer("lock ");
952 data++;
946 } 953 }
954
947 bool processed = true; // Will be set to false if the current instruction 955 bool processed = true; // Will be set to false if the current instruction
948 // is not in 'instructions' table. 956 // is not in 'instructions' table.
949 const InstructionDesc& idesc = instruction_table_->Get(*data); 957 const InstructionDesc& idesc = instruction_table_->Get(*data);
950 switch (idesc.type) { 958 switch (idesc.type) {
951 case ZERO_OPERANDS_INSTR: 959 case ZERO_OPERANDS_INSTR:
952 AppendToBuffer("%s", idesc.mnem); 960 AppendToBuffer("%s", idesc.mnem);
953 data++; 961 data++;
954 break; 962 break;
955 963
956 case TWO_OPERANDS_INSTR: 964 case TWO_OPERANDS_INSTR:
(...skipping 198 matching lines...) Expand 10 before | Expand all | Expand 10 after
1155 data += 2; 1163 data += 2;
1156 AppendToBuffer("%s ", f0mnem); 1164 AppendToBuffer("%s ", f0mnem);
1157 int mod, regop, rm; 1165 int mod, regop, rm;
1158 get_modrm(*data, &mod, &regop, &rm); 1166 get_modrm(*data, &mod, &regop, &rm);
1159 data += PrintRightOperand(data); 1167 data += PrintRightOperand(data);
1160 if (f0byte == 0xAB) { 1168 if (f0byte == 0xAB) {
1161 AppendToBuffer(",%s", NameOfCPURegister(regop)); 1169 AppendToBuffer(",%s", NameOfCPURegister(regop));
1162 } else { 1170 } else {
1163 AppendToBuffer(",%s,cl", NameOfCPURegister(regop)); 1171 AppendToBuffer(",%s,cl", NameOfCPURegister(regop));
1164 } 1172 }
1173 } else if (f0byte == 0xB0) {
1174 // cmpxchg_b
1175 data += 2;
1176 AppendToBuffer("%s ", f0mnem);
1177 int mod, regop, rm;
1178 get_modrm(*data, &mod, &regop, &rm);
1179 data += PrintRightOperand(data);
1180 AppendToBuffer(",%s", NameOfByteCPURegister(regop));
1181 } else if (f0byte == 0xB1) {
1182 // cmpxchg
1183 data += 2;
1184 data += PrintOperands(f0mnem, OPER_REG_OP_ORDER, data);
1185 } else if (f0byte == 0xBC) {
1186 data += 2;
1187 int mod, regop, rm;
1188 get_modrm(*data, &mod, &regop, &rm);
1189 AppendToBuffer("%s %s,", f0mnem, NameOfCPURegister(regop));
1190 data += PrintRightOperand(data);
1165 } else if (f0byte == 0xBD) { 1191 } else if (f0byte == 0xBD) {
1166 data += 2; 1192 data += 2;
1167 int mod, regop, rm; 1193 int mod, regop, rm;
1168 get_modrm(*data, &mod, &regop, &rm); 1194 get_modrm(*data, &mod, &regop, &rm);
1169 AppendToBuffer("%s %s,", f0mnem, NameOfCPURegister(regop)); 1195 AppendToBuffer("%s %s,", f0mnem, NameOfCPURegister(regop));
1170 data += PrintRightOperand(data); 1196 data += PrintRightOperand(data);
1171 } else { 1197 } else {
1172 UnimplementedInstruction(); 1198 UnimplementedInstruction();
1173 } 1199 }
1174 } 1200 }
(...skipping 90 matching lines...) Expand 10 before | Expand all | Expand 10 after
1265 AppendToBuffer("nop"); // 0x66 prefix 1291 AppendToBuffer("nop"); // 0x66 prefix
1266 } else if (*data == 0x90) { 1292 } else if (*data == 0x90) {
1267 AppendToBuffer("nop"); // 0x66 prefix 1293 AppendToBuffer("nop"); // 0x66 prefix
1268 } else if (*data == 0x8B) { 1294 } else if (*data == 0x8B) {
1269 data++; 1295 data++;
1270 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data); 1296 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data);
1271 } else if (*data == 0x87) { 1297 } else if (*data == 0x87) {
1272 data++; 1298 data++;
1273 int mod, regop, rm; 1299 int mod, regop, rm;
1274 get_modrm(*data, &mod, &regop, &rm); 1300 get_modrm(*data, &mod, &regop, &rm);
1275 AppendToBuffer("xchg_w "); 1301 AppendToBuffer("xchg_w %s,", NameOfCPURegister(regop));
1276 data += PrintRightOperand(data); 1302 data += PrintRightOperand(data);
1277 AppendToBuffer(",%s", NameOfCPURegister(regop));
1278 } else if (*data == 0x89) { 1303 } else if (*data == 0x89) {
1279 data++; 1304 data++;
1280 int mod, regop, rm; 1305 int mod, regop, rm;
1281 get_modrm(*data, &mod, &regop, &rm); 1306 get_modrm(*data, &mod, &regop, &rm);
1282 AppendToBuffer("mov_w "); 1307 AppendToBuffer("mov_w ");
1283 data += PrintRightOperand(data); 1308 data += PrintRightOperand(data);
1284 AppendToBuffer(",%s", NameOfCPURegister(regop)); 1309 AppendToBuffer(",%s", NameOfCPURegister(regop));
1285 } else if (*data == 0xC7) { 1310 } else if (*data == 0xC7) {
1286 data++; 1311 data++;
1287 AppendToBuffer("%s ", "mov_w"); 1312 AppendToBuffer("%s ", "mov_w");
(...skipping 218 matching lines...) Expand 10 before | Expand all | Expand 10 after
1506 NameOfXMMRegister(rm)); 1531 NameOfXMMRegister(rm));
1507 data++; 1532 data++;
1508 } else if (*data == 0xEB) { 1533 } else if (*data == 0xEB) {
1509 data++; 1534 data++;
1510 int mod, regop, rm; 1535 int mod, regop, rm;
1511 get_modrm(*data, &mod, &regop, &rm); 1536 get_modrm(*data, &mod, &regop, &rm);
1512 AppendToBuffer("por %s,%s", 1537 AppendToBuffer("por %s,%s",
1513 NameOfXMMRegister(regop), 1538 NameOfXMMRegister(regop),
1514 NameOfXMMRegister(rm)); 1539 NameOfXMMRegister(rm));
1515 data++; 1540 data++;
1541 } else if (*data == 0xB1) {
1542 data++;
1543 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data);
1516 } else { 1544 } else {
1517 UnimplementedInstruction(); 1545 UnimplementedInstruction();
1518 } 1546 }
1519 } else { 1547 } else {
1520 UnimplementedInstruction(); 1548 UnimplementedInstruction();
1521 } 1549 }
1522 break; 1550 break;
1523 1551
1524 case 0xFE: 1552 case 0xFE:
1525 { data++; 1553 { data++;
(...skipping 299 matching lines...) Expand 10 before | Expand all | Expand 10 after
1825 fprintf(f, " "); 1853 fprintf(f, " ");
1826 } 1854 }
1827 fprintf(f, " %s\n", buffer.start()); 1855 fprintf(f, " %s\n", buffer.start());
1828 } 1856 }
1829 } 1857 }
1830 1858
1831 1859
1832 } // namespace disasm 1860 } // namespace disasm
1833 1861
1834 #endif // V8_TARGET_ARCH_X87 1862 #endif // V8_TARGET_ARCH_X87
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