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Side by Side Diff: src/arm64/decoder-arm64-inl.h

Issue 1990073002: Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: typo Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_DECODER_ARM64_INL_H_ 5 #ifndef V8_ARM64_DECODER_ARM64_INL_H_
6 #define V8_ARM64_DECODER_ARM64_INL_H_ 6 #define V8_ARM64_DECODER_ARM64_INL_H_
7 7
8 #include "src/arm64/decoder-arm64.h" 8 #include "src/arm64/decoder-arm64.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/utils.h" 10 #include "src/utils.h"
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210 void Decoder<V>::DecodeLoadStore(Instruction* instr) { 210 void Decoder<V>::DecodeLoadStore(Instruction* instr) {
211 DCHECK((instr->Bits(27, 24) == 0x8) || 211 DCHECK((instr->Bits(27, 24) == 0x8) ||
212 (instr->Bits(27, 24) == 0x9) || 212 (instr->Bits(27, 24) == 0x9) ||
213 (instr->Bits(27, 24) == 0xC) || 213 (instr->Bits(27, 24) == 0xC) ||
214 (instr->Bits(27, 24) == 0xD) ); 214 (instr->Bits(27, 24) == 0xD) );
215 215
216 if (instr->Bit(24) == 0) { 216 if (instr->Bit(24) == 0) {
217 if (instr->Bit(28) == 0) { 217 if (instr->Bit(28) == 0) {
218 if (instr->Bit(29) == 0) { 218 if (instr->Bit(29) == 0) {
219 if (instr->Bit(26) == 0) { 219 if (instr->Bit(26) == 0) {
220 // TODO(all): VisitLoadStoreExclusive. 220 if (instr->Mask(0xA08000) == 0x800000 ||
221 V::VisitUnimplemented(instr); 221 instr->Mask(0xA00000) == 0xA00000) {
222 V::VisitUnallocated(instr);
223 } else if (instr->Mask(0x808000) == 0) {
224 // Load/Store exclusive without acquire/release are unimplemented.
225 V::VisitUnimplemented(instr);
226 } else {
227 V::VisitLoadStoreAcquireRelease(instr);
228 }
222 } else { 229 } else {
223 DecodeAdvSIMDLoadStore(instr); 230 DecodeAdvSIMDLoadStore(instr);
224 } 231 }
225 } else { 232 } else {
226 if ((instr->Bits(31, 30) == 0x3) || 233 if ((instr->Bits(31, 30) == 0x3) ||
227 (instr->Mask(0xC4400000) == 0x40000000)) { 234 (instr->Mask(0xC4400000) == 0x40000000)) {
228 V::VisitUnallocated(instr); 235 V::VisitUnallocated(instr);
229 } else { 236 } else {
230 if (instr->Bit(23) == 0) { 237 if (instr->Bit(23) == 0) {
231 if (instr->Mask(0xC4400000) == 0xC0400000) { 238 if (instr->Mask(0xC4400000) == 0xC0400000) {
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641 // TODO(all): Implement Advanced SIMD data processing instruction decode. 648 // TODO(all): Implement Advanced SIMD data processing instruction decode.
642 DCHECK(instr->Bits(27, 25) == 0x7); 649 DCHECK(instr->Bits(27, 25) == 0x7);
643 V::VisitUnimplemented(instr); 650 V::VisitUnimplemented(instr);
644 } 651 }
645 652
646 653
647 } // namespace internal 654 } // namespace internal
648 } // namespace v8 655 } // namespace v8
649 656
650 #endif // V8_ARM64_DECODER_ARM64_INL_H_ 657 #endif // V8_ARM64_DECODER_ARM64_INL_H_
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