Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler

src/arm64/disasm-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <assert.h>
 #include <stdarg.h>
 #include <stdio.h>
 #include <string.h>
 
 #if V8_TARGET_ARCH_ARM64
@@ skipping 896 matching lines @@
 
   switch (instr->Mask(LoadStorePairOffsetMask)) {
     #define LSP_OFFSET(A, B, C, D) \
     case A##_off: mnemonic = B; form = C ", ['Xns'ILP" D "]"; break;
     LOAD_STORE_PAIR_LIST(LSP_OFFSET)
     #undef LSP_OFFSET
   }
   Format(instr, mnemonic, form);
 }
 
+void DisassemblingDecoder::VisitLoadStoreAcquireRelease(Instruction *instr) {
+  const char *mnemonic = "unimplemented";
+  const char *form = "'Wt, ['Xn]";
+  const char *form_x = "'Xt, ['Xn]";
+
+  switch (instr->Mask(LoadStoreAcquireReleaseMask)) {
+    case LDAXR_b: mnemonic = "ldaxrb"; break;
+    case STLR_b:  mnemonic = "stlrb"; break;
+    case LDAR_b:  mnemonic = "ldarb"; break;
+    case LDAXR_h: mnemonic = "ldaxrh"; break;
+    case STLR_h:  mnemonic = "stlrh"; break;
+    case LDAR_h:  mnemonic = "ldarh"; break;
+    case LDAXR_w: mnemonic = "ldaxr"; break;
+    case STLR_w:  mnemonic = "stlr"; break;
+    case LDAR_w:  mnemonic = "ldar"; break;
+    case LDAXR_x: mnemonic = "ldaxr"; form = form_x; break;
+    case STLR_x:  mnemonic = "stlr"; form = form_x; break;
+    case LDAR_x:  mnemonic = "ldar"; form = form_x; break;
+    default: form = "(LoadStoreAcquireReleaseMask)";
+  }
+  Format(instr, mnemonic, form);
+}
+
+void DisassemblingDecoder::VisitStoreReleaseExclusive(Instruction *instr) {
+  const char *mnemonic = "unimplemented";
+  const char *form = "'Ws, 'Wt, ['Xn]";
+  const char *form_x = "'Ws, 'Xt, ['Xn]";
+
+  switch (instr->Mask(StoreReleaseExclusiveMask)) {
+    case STLXR_h: mnemonic = "stlxrh"; break;
+    case STLXR_b: mnemonic = "stlxrb"; break;
+    case STLXR_w: mnemonic = "stlxr"; break;
+    case STLXR_x: mnemonic = "stlxr"; form = form_x; break;
+    default: form = "(StoreReleaseExclusiveMask)";
+  }
+  Format(instr, mnemonic, form);
+}
 
 void DisassemblingDecoder::VisitFPCompare(Instruction* instr) {
   const char *mnemonic = "unimplemented";
   const char *form = "'Fn, 'Fm";
   const char *form_zero = "'Fn, #0.0";
 
   switch (instr->Mask(FPCompareMask)) {
     case FCMP_s_zero:
     case FCMP_d_zero: form = form_zero;  // Fall through.
     case FCMP_s:
@@ skipping 361 matching lines @@
     case 'a': reg_num = instr->Ra(); break;
     case 't': {
       if (format[2] == '2') {
         reg_num = instr->Rt2();
         field_len = 3;
       } else {
         reg_num = instr->Rt();
       }
       break;
     }
+    case 's':
+      reg_num = instr->Rs();
+      break;
     default: UNREACHABLE();
   }
 
   // Increase field length for registers tagged as stack.
   if (format[2] == 's') {
     field_len = 3;
   }
 
   char reg_type;
   if (format[0] == 'R') {
@@ skipping 500 matching lines @@
   decoder.AppendVisitor(&disasm);
 
   for (byte* pc = start; pc < end; pc += v8::internal::kInstructionSize) {
     decoder.Decode(reinterpret_cast<v8::internal::Instruction*>(pc));
   }
 }
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_ARM64