Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler

Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler

They are not currently implemented by the ARM64 simulator.

R=jarin@chromium.org, bmeurer@chromium.org

Committed: https://crrev.com/d208cdd7f1293e199799a086151129f3f32a9fb7
Cr-Commit-Position: refs/heads/master@{#36385}

[binji, 2016-05-18 22:57:33]

https://codereview.chromium.org/1990073002/diff/20001/src/arm64/constants-arm...
File src/arm64/constants-arm64.h (right):

https://codereview.chromium.org/1990073002/diff/20001/src/arm64/constants-arm...
src/arm64/constants-arm64.h:129: V_(Rs, 20, 16, Bits)  /* Store-exclusive status
*/    \
this is the line I added, the rest is clang-format

https://codereview.chromium.org/1990073002/diff/20001/src/arm64/constants-arm...
src/arm64/constants-arm64.h:879: enum StoreReleaseExclusiveOp {
these almost have the same structure as the ops above, but the stlxr*
instructions take an additional register (which must be 0b11111 for the other
ops). I figured that was reason enough to separate them.

[Jarin, 2016-05-19 04:24:49]

lgtm.

[binji, 2016-05-19 17:49:49]

https://codereview.chromium.org/1990073002/diff/20001/src/arm64/constants-arm...
File src/arm64/constants-arm64.h (right):

https://codereview.chromium.org/1990073002/diff/20001/src/arm64/constants-arm...
src/arm64/constants-arm64.h:879: enum StoreReleaseExclusiveOp {
On 2016/05/18 22:57:33, binji wrote:
> these almost have the same structure as the ops above, but the stlxr*
> instructions take an additional register (which must be 0b11111 for the other
> ops). I figured that was reason enough to separate them.

I re-read the ARM64 spec, and it says that the additional registers are ignored
(but normally are set to 0b11111), so I was over-specifying here. So I
recombined these into one operation.

If we ever add STXR* and LDXR*, they'll work with the same structure too.

[binji, 2016-05-19 19:52:22]

The CQ bit was checked by binji@chromium.org

[binji, 2016-05-19 19:52:22]

The patchset sent to the CQ was uploaded after l-g-t-m from jarin@chromium.org
Link to the patchset: https://codereview.chromium.org/1990073002/#ps60001
(title: "typo")

[commit-bot: I haz the power, 2016-05-19 19:52:31]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1990073002/60001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1990073002/60001

[commit-bot: I haz the power, 2016-05-19 20:08:22]

Committed patchset #4 (id:60001)

[commit-bot: I haz the power, 2016-05-19 20:10:12]

Description was changed from

==========
Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler

They are not currently implemented by the ARM64 simulator.

R=jarin@chromium.org, bmeurer@chromium.org
==========

to

==========
Add {lda,stl}x?r{,b,h} instructions to ARM64 assembler/disassembler

They are not currently implemented by the ARM64 simulator.

R=jarin@chromium.org, bmeurer@chromium.org

Committed: https://crrev.com/d208cdd7f1293e199799a086151129f3f32a9fb7
Cr-Commit-Position: refs/heads/master@{#36385}
==========

[commit-bot: I haz the power, 2016-05-19 20:10:13]

Patchset 4 (id:??) landed as
https://crrev.com/d208cdd7f1293e199799a086151129f3f32a9fb7
Cr-Commit-Position: refs/heads/master@{#36385}