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| 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 157 void _br(CfgNode *Target) { Context.insert<InstMIPS32Br>(Target); } | 157 void _br(CfgNode *Target) { Context.insert<InstMIPS32Br>(Target); } |
| 158 | 158 |
| 159 void _ret(Variable *RA, Variable *Src0 = nullptr) { | 159 void _ret(Variable *RA, Variable *Src0 = nullptr) { |
| 160 Context.insert<InstMIPS32Ret>(RA, Src0); | 160 Context.insert<InstMIPS32Ret>(RA, Src0); |
| 161 } | 161 } |
| 162 | 162 |
| 163 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { | 163 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 164 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); | 164 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); |
| 165 } | 165 } |
| 166 | 166 |
| 167 void _div(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 168 Context.insert<InstMIPS32Div>(Dest, Src0, Src1); |
| 169 } |
| 170 |
| 171 void _divu(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 172 Context.insert<InstMIPS32Divu>(Dest, Src0, Src1); |
| 173 } |
| 174 |
| 167 void _lui(Variable *Dest, uint32_t Imm) { | 175 void _lui(Variable *Dest, uint32_t Imm) { |
| 168 Context.insert<InstMIPS32Lui>(Dest, Imm); | 176 Context.insert<InstMIPS32Lui>(Dest, Imm); |
| 169 } | 177 } |
| 170 | 178 |
| 171 void _mov(Variable *Dest, Operand *Src0) { | 179 void _mov(Variable *Dest, Operand *Src0) { |
| 172 assert(Dest != nullptr); | 180 assert(Dest != nullptr); |
| 173 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0); | 181 // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0); |
| 174 if (llvm::isa<ConstantRelocatable>(Src0)) { | 182 if (llvm::isa<ConstantRelocatable>(Src0)) { |
| 175 Context.insert<InstMIPS32La>(Dest, Src0); | 183 Context.insert<InstMIPS32La>(Dest, Src0); |
| 176 } else { | 184 } else { |
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| 420 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 428 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
| 421 | 429 |
| 422 private: | 430 private: |
| 423 ~TargetHeaderMIPS32() = default; | 431 ~TargetHeaderMIPS32() = default; |
| 424 }; | 432 }; |
| 425 | 433 |
| 426 } // end of namespace MIPS32 | 434 } // end of namespace MIPS32 |
| 427 } // end of namespace Ice | 435 } // end of namespace Ice |
| 428 | 436 |
| 429 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 437 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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