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Side by Side Diff: src/IceInstMIPS32.h

Issue 1989303002: Subzero, MIPS32: Implements integer division instructions sdiv, udiv, srem, urem (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Workaround for DIV with three operands Created 4 years, 7 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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117 public: 117 public:
118 enum InstKindMIPS32 { 118 enum InstKindMIPS32 {
119 k__Start = Inst::Target, 119 k__Start = Inst::Target,
120 Add, 120 Add,
121 Addiu, 121 Addiu,
122 Addu, 122 Addu,
123 And, 123 And,
124 Andi, 124 Andi,
125 Br, 125 Br,
126 Call, 126 Call,
127 Div,
128 Divu,
127 La, 129 La,
128 Label, 130 Label,
129 Lui, 131 Lui,
130 Mfhi, 132 Mfhi,
131 Mflo, 133 Mflo,
132 Mov, // actually a pseudo op for addi rd, rs, 0 134 Mov, // actually a pseudo op for addi rd, rs, 0
133 Mthi, 135 Mthi,
134 Mtlo, 136 Mtlo,
135 Mul, 137 Mul,
136 Mult, 138 Mult,
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463 static const char *Opcode; 465 static const char *Opcode;
464 466
465 const uint32_t Imm; 467 const uint32_t Imm;
466 }; 468 };
467 469
468 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; 470 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
469 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; 471 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
470 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; 472 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
471 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; 473 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
472 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>; 474 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>;
475 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
476 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
473 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; 477 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
474 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; 478 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
475 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; 479 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
476 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; 480 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
477 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; 481 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
478 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; 482 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
479 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; 483 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
480 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; 484 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
481 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; 485 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
482 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; 486 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
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544 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 548 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
545 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 549 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
546 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 550 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
547 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 551 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
548 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 552 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
549 553
550 } // end of namespace MIPS32 554 } // end of namespace MIPS32
551 } // end of namespace Ice 555 } // end of namespace Ice
552 556
553 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 557 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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