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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> | 5 #include <assert.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdio.h> | 7 #include <stdio.h> |
8 | 8 |
9 #if V8_TARGET_ARCH_IA32 | 9 #if V8_TARGET_ARCH_IA32 |
10 | 10 |
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1225 case 0xA4: | 1225 case 0xA4: |
1226 return "shld"; | 1226 return "shld"; |
1227 case 0xA5: | 1227 case 0xA5: |
1228 return "shld"; | 1228 return "shld"; |
1229 case 0xAD: | 1229 case 0xAD: |
1230 return "shrd"; | 1230 return "shrd"; |
1231 case 0xAC: | 1231 case 0xAC: |
1232 return "shrd"; // 3-operand version. | 1232 return "shrd"; // 3-operand version. |
1233 case 0xAB: | 1233 case 0xAB: |
1234 return "bts"; | 1234 return "bts"; |
| 1235 case 0xB0: |
| 1236 return "cmpxchg_b"; |
| 1237 case 0xB1: |
| 1238 return "cmpxchg"; |
1235 case 0xBC: | 1239 case 0xBC: |
1236 return "bsf"; | 1240 return "bsf"; |
1237 case 0xBD: | 1241 case 0xBD: |
1238 return "bsr"; | 1242 return "bsr"; |
1239 default: return NULL; | 1243 default: return NULL; |
1240 } | 1244 } |
1241 } | 1245 } |
1242 | 1246 |
1243 | 1247 |
1244 // Disassembled instruction '*instr' and writes it into 'out_buffer'. | 1248 // Disassembled instruction '*instr' and writes it into 'out_buffer'. |
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1257 data++; | 1261 data++; |
1258 } else if (*data == 0xC4 && *(data + 1) >= 0xc0) { | 1262 } else if (*data == 0xC4 && *(data + 1) >= 0xc0) { |
1259 vex_byte0_ = *data; | 1263 vex_byte0_ = *data; |
1260 vex_byte1_ = *(data + 1); | 1264 vex_byte1_ = *(data + 1); |
1261 vex_byte2_ = *(data + 2); | 1265 vex_byte2_ = *(data + 2); |
1262 data += 3; | 1266 data += 3; |
1263 } else if (*data == 0xC5 && *(data + 1) >= 0xc0) { | 1267 } else if (*data == 0xC5 && *(data + 1) >= 0xc0) { |
1264 vex_byte0_ = *data; | 1268 vex_byte0_ = *data; |
1265 vex_byte1_ = *(data + 1); | 1269 vex_byte1_ = *(data + 1); |
1266 data += 2; | 1270 data += 2; |
| 1271 } else if (*data == 0xF0 /*lock*/) { |
| 1272 AppendToBuffer("lock "); |
| 1273 data++; |
1267 } | 1274 } |
1268 | 1275 |
1269 bool processed = true; // Will be set to false if the current instruction | 1276 bool processed = true; // Will be set to false if the current instruction |
1270 // is not in 'instructions' table. | 1277 // is not in 'instructions' table. |
1271 // Decode AVX instructions. | 1278 // Decode AVX instructions. |
1272 if (vex_byte0_ != 0) { | 1279 if (vex_byte0_ != 0) { |
1273 data += AVXInstruction(data); | 1280 data += AVXInstruction(data); |
1274 } else { | 1281 } else { |
1275 const InstructionDesc& idesc = instruction_table_->Get(*data); | 1282 const InstructionDesc& idesc = instruction_table_->Get(*data); |
1276 switch (idesc.type) { | 1283 switch (idesc.type) { |
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1489 data += 2; | 1496 data += 2; |
1490 AppendToBuffer("%s ", f0mnem); | 1497 AppendToBuffer("%s ", f0mnem); |
1491 int mod, regop, rm; | 1498 int mod, regop, rm; |
1492 get_modrm(*data, &mod, ®op, &rm); | 1499 get_modrm(*data, &mod, ®op, &rm); |
1493 data += PrintRightOperand(data); | 1500 data += PrintRightOperand(data); |
1494 if (f0byte == 0xAB) { | 1501 if (f0byte == 0xAB) { |
1495 AppendToBuffer(",%s", NameOfCPURegister(regop)); | 1502 AppendToBuffer(",%s", NameOfCPURegister(regop)); |
1496 } else { | 1503 } else { |
1497 AppendToBuffer(",%s,cl", NameOfCPURegister(regop)); | 1504 AppendToBuffer(",%s,cl", NameOfCPURegister(regop)); |
1498 } | 1505 } |
| 1506 } else if (f0byte == 0xB0) { |
| 1507 // cmpxchg_b |
| 1508 data += 2; |
| 1509 AppendToBuffer("%s ", f0mnem); |
| 1510 int mod, regop, rm; |
| 1511 get_modrm(*data, &mod, ®op, &rm); |
| 1512 data += PrintRightOperand(data); |
| 1513 AppendToBuffer(",%s", NameOfByteCPURegister(regop)); |
| 1514 } else if (f0byte == 0xB1) { |
| 1515 // cmpxchg |
| 1516 data += 2; |
| 1517 data += PrintOperands(f0mnem, OPER_REG_OP_ORDER, data); |
1499 } else if (f0byte == 0xBC) { | 1518 } else if (f0byte == 0xBC) { |
1500 data += 2; | 1519 data += 2; |
1501 int mod, regop, rm; | 1520 int mod, regop, rm; |
1502 get_modrm(*data, &mod, ®op, &rm); | 1521 get_modrm(*data, &mod, ®op, &rm); |
1503 AppendToBuffer("%s %s,", f0mnem, NameOfCPURegister(regop)); | 1522 AppendToBuffer("%s %s,", f0mnem, NameOfCPURegister(regop)); |
1504 data += PrintRightOperand(data); | 1523 data += PrintRightOperand(data); |
1505 } else if (f0byte == 0xBD) { | 1524 } else if (f0byte == 0xBD) { |
1506 data += 2; | 1525 data += 2; |
1507 int mod, regop, rm; | 1526 int mod, regop, rm; |
1508 get_modrm(*data, &mod, ®op, &rm); | 1527 get_modrm(*data, &mod, ®op, &rm); |
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1605 AppendToBuffer("nop"); // 0x66 prefix | 1624 AppendToBuffer("nop"); // 0x66 prefix |
1606 } else if (*data == 0x90) { | 1625 } else if (*data == 0x90) { |
1607 AppendToBuffer("nop"); // 0x66 prefix | 1626 AppendToBuffer("nop"); // 0x66 prefix |
1608 } else if (*data == 0x8B) { | 1627 } else if (*data == 0x8B) { |
1609 data++; | 1628 data++; |
1610 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data); | 1629 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data); |
1611 } else if (*data == 0x87) { | 1630 } else if (*data == 0x87) { |
1612 data++; | 1631 data++; |
1613 int mod, regop, rm; | 1632 int mod, regop, rm; |
1614 get_modrm(*data, &mod, ®op, &rm); | 1633 get_modrm(*data, &mod, ®op, &rm); |
1615 AppendToBuffer("xchg_w "); | 1634 AppendToBuffer("xchg_w %s,", NameOfCPURegister(regop)); |
1616 data += PrintRightOperand(data); | 1635 data += PrintRightOperand(data); |
1617 AppendToBuffer(",%s", NameOfCPURegister(regop)); | |
1618 } else if (*data == 0x89) { | 1636 } else if (*data == 0x89) { |
1619 data++; | 1637 data++; |
1620 int mod, regop, rm; | 1638 int mod, regop, rm; |
1621 get_modrm(*data, &mod, ®op, &rm); | 1639 get_modrm(*data, &mod, ®op, &rm); |
1622 AppendToBuffer("mov_w "); | 1640 AppendToBuffer("mov_w "); |
1623 data += PrintRightOperand(data); | 1641 data += PrintRightOperand(data); |
1624 AppendToBuffer(",%s", NameOfCPURegister(regop)); | 1642 AppendToBuffer(",%s", NameOfCPURegister(regop)); |
1625 } else if (*data == 0xC7) { | 1643 } else if (*data == 0xC7) { |
1626 data++; | 1644 data++; |
1627 AppendToBuffer("%s ", "mov_w"); | 1645 AppendToBuffer("%s ", "mov_w"); |
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1877 NameOfXMMRegister(rm)); | 1895 NameOfXMMRegister(rm)); |
1878 data++; | 1896 data++; |
1879 } else if (*data == 0xEB) { | 1897 } else if (*data == 0xEB) { |
1880 data++; | 1898 data++; |
1881 int mod, regop, rm; | 1899 int mod, regop, rm; |
1882 get_modrm(*data, &mod, ®op, &rm); | 1900 get_modrm(*data, &mod, ®op, &rm); |
1883 AppendToBuffer("por %s,%s", | 1901 AppendToBuffer("por %s,%s", |
1884 NameOfXMMRegister(regop), | 1902 NameOfXMMRegister(regop), |
1885 NameOfXMMRegister(rm)); | 1903 NameOfXMMRegister(rm)); |
1886 data++; | 1904 data++; |
| 1905 } else if (*data == 0xB1) { |
| 1906 data++; |
| 1907 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data); |
1887 } else { | 1908 } else { |
1888 UnimplementedInstruction(); | 1909 UnimplementedInstruction(); |
1889 } | 1910 } |
1890 } else { | 1911 } else { |
1891 UnimplementedInstruction(); | 1912 UnimplementedInstruction(); |
1892 } | 1913 } |
1893 break; | 1914 break; |
1894 | 1915 |
1895 case 0xFE: | 1916 case 0xFE: |
1896 { data++; | 1917 { data++; |
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2287 fprintf(f, " "); | 2308 fprintf(f, " "); |
2288 } | 2309 } |
2289 fprintf(f, " %s\n", buffer.start()); | 2310 fprintf(f, " %s\n", buffer.start()); |
2290 } | 2311 } |
2291 } | 2312 } |
2292 | 2313 |
2293 | 2314 |
2294 } // namespace disasm | 2315 } // namespace disasm |
2295 | 2316 |
2296 #endif // V8_TARGET_ARCH_IA32 | 2317 #endif // V8_TARGET_ARCH_IA32 |
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