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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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519 } | 519 } |
520 uint32_t jump_address(Label* L); | 520 uint32_t jump_address(Label* L); |
521 | 521 |
522 // Puts a labels target address at the given position. | 522 // Puts a labels target address at the given position. |
523 // The high 8 bits are set to zero. | 523 // The high 8 bits are set to zero. |
524 void label_at_put(Label* L, int at_offset); | 524 void label_at_put(Label* L, int at_offset); |
525 | 525 |
526 // Read/Modify the code target address in the branch/call instruction at pc. | 526 // Read/Modify the code target address in the branch/call instruction at pc. |
527 static Address target_address_at(Address pc); | 527 static Address target_address_at(Address pc); |
528 static void set_target_address_at(Address pc, Address target); | 528 static void set_target_address_at(Address pc, Address target); |
| 529 // On MIPS there is no Constant Pool so we skip that parameter. |
| 530 INLINE(static Address target_address_at(Address pc, |
| 531 ConstantPoolArray* constant_pool)) { |
| 532 return target_address_at(pc); |
| 533 } |
| 534 INLINE(static void set_target_address_at(Address pc, |
| 535 ConstantPoolArray* constant_pool, |
| 536 Address target)) { |
| 537 set_target_address_at(pc, target); |
| 538 } |
| 539 INLINE(static Address target_address_at(Address pc, Code* code)) { |
| 540 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 541 return target_address_at(pc, constant_pool); |
| 542 } |
| 543 INLINE(static void set_target_address_at(Address pc, |
| 544 Code* code, |
| 545 Address target)) { |
| 546 ConstantPoolArray* constant_pool = code ? code->constant_pool() : NULL; |
| 547 set_target_address_at(pc, constant_pool, target); |
| 548 } |
529 | 549 |
530 // Return the code target address at a call site from the return address | 550 // Return the code target address at a call site from the return address |
531 // of that call in the instruction stream. | 551 // of that call in the instruction stream. |
532 inline static Address target_address_from_return_address(Address pc); | 552 inline static Address target_address_from_return_address(Address pc); |
533 | 553 |
534 static void JumpLabelToJumpRegister(Address pc); | 554 static void JumpLabelToJumpRegister(Address pc); |
535 | 555 |
536 static void QuietNaN(HeapObject* nan); | 556 static void QuietNaN(HeapObject* nan); |
537 | 557 |
538 // This sets the branch destination (which gets loaded at the call address). | 558 // This sets the branch destination (which gets loaded at the call address). |
539 // This is for calls and branches within generated code. The serializer | 559 // This is for calls and branches within generated code. The serializer |
540 // has already deserialized the lui/ori instructions etc. | 560 // has already deserialized the lui/ori instructions etc. |
541 inline static void deserialization_set_special_target_at( | 561 inline static void deserialization_set_special_target_at( |
542 Address instruction_payload, Address target) { | 562 Address instruction_payload, Code* code, Address target) { |
543 set_target_address_at( | 563 set_target_address_at( |
544 instruction_payload - kInstructionsFor32BitConstant * kInstrSize, | 564 instruction_payload - kInstructionsFor32BitConstant * kInstrSize, |
| 565 code, |
545 target); | 566 target); |
546 } | 567 } |
547 | 568 |
548 // Size of an instruction. | 569 // Size of an instruction. |
549 static const int kInstrSize = sizeof(Instr); | 570 static const int kInstrSize = sizeof(Instr); |
550 | 571 |
551 // Difference between address of current opcode and target address offset. | 572 // Difference between address of current opcode and target address offset. |
552 static const int kBranchPCOffset = 4; | 573 static const int kBranchPCOffset = 4; |
553 | 574 |
554 // Here we are patching the address in the LUI/ORI instruction pair. | 575 // Here we are patching the address in the LUI/ORI instruction pair. |
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1247 class EnsureSpace BASE_EMBEDDED { | 1268 class EnsureSpace BASE_EMBEDDED { |
1248 public: | 1269 public: |
1249 explicit EnsureSpace(Assembler* assembler) { | 1270 explicit EnsureSpace(Assembler* assembler) { |
1250 assembler->CheckBuffer(); | 1271 assembler->CheckBuffer(); |
1251 } | 1272 } |
1252 }; | 1273 }; |
1253 | 1274 |
1254 } } // namespace v8::internal | 1275 } } // namespace v8::internal |
1255 | 1276 |
1256 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1277 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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