Increases the number of ARM floating-point registers.

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 1076 matching lines @@
 }
 
 
 // Make sure we can store and reload the D registers using vstmd and vldmd
 ASSEMBLER_TEST_GENERATE(VstmdVldmd, assembler) {
   __ LoadDImmediate(D0, 0.0, R0);
   __ LoadDImmediate(D1, 1.0, R0);
   __ LoadDImmediate(D2, 2.0, R0);
   __ LoadDImmediate(D3, 3.0, R0);
   __ LoadDImmediate(D4, 4.0, R0);
-  __ vstmd(DB_W, SP, D0, D4);  // Push D0 - D4 onto the stack, dec SP
+  __ vstmd(DB_W, SP, D0, 5);  // Push D0 - D4 onto the stack, dec SP
   __ LoadDImmediate(D0, 0.0, R0);
   __ LoadDImmediate(D1, 0.0, R0);
   __ LoadDImmediate(D2, 0.0, R0);
   __ LoadDImmediate(D3, 0.0, R0);
   __ LoadDImmediate(D4, 0.0, R0);
-  __ vldmd(IA_W, SP, D0, D4);  // Pop stack into D0 - D4, inc SP
+  __ vldmd(IA_W, SP, D0, 5);  // Pop stack into D0 - D4, inc SP
 
   // Load success value into R0
   __ mov(R0, ShifterOperand(42));
 
   // Check that 4.0 is back in D4
   __ LoadDImmediate(D5, 4.0, R1);
   __ vcmpd(D4, D5);
   __ vmstat();
   __ mov(R0, ShifterOperand(0), NE);  // Put failure into R0 if NE
 
@@ skipping 79 matching lines @@
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 // Make sure we can start somewhere other than D0
 ASSEMBLER_TEST_GENERATE(VstmdVldmd1, assembler) {
   __ LoadDImmediate(D1, 1.0, R0);
   __ LoadDImmediate(D2, 2.0, R0);
   __ LoadDImmediate(D3, 3.0, R0);
   __ LoadDImmediate(D4, 4.0, R0);
-  __ vstmd(DB_W, SP, D1, D4);  // Push D1 - D4 onto the stack, dec SP
+  __ vstmd(DB_W, SP, D1, 4);  // Push D1 - D4 onto the stack, dec SP
   __ LoadDImmediate(D1, 0.0, R0);
   __ LoadDImmediate(D2, 0.0, R0);
   __ LoadDImmediate(D3, 0.0, R0);
   __ LoadDImmediate(D4, 0.0, R0);
-  __ vldmd(IA_W, SP, D1, D4);  // Pop stack into D1 - D4, inc SP
+  __ vldmd(IA_W, SP, D1, 4);  // Pop stack into D1 - D4, inc SP
 
   // Load success value into R0
   __ mov(R0, ShifterOperand(42));
 
   // Check that 4.0 is back in D4
   __ LoadDImmediate(D5, 4.0, R1);
   __ vcmpd(D4, D5);
   __ vmstat();
   __ mov(R0, ShifterOperand(0), NE);  // Put failure into R0 if NE
 
@@ skipping 80 matching lines @@
 
 // Make sure we can store the D registers using vstmd and
 // load them into a different set using vldmd
 ASSEMBLER_TEST_GENERATE(VstmdVldmd_off, assembler) {
   __ LoadDImmediate(D0, 0.0, R0);
   __ LoadDImmediate(D1, 1.0, R0);
   __ LoadDImmediate(D2, 2.0, R0);
   __ LoadDImmediate(D3, 3.0, R0);
   __ LoadDImmediate(D4, 4.0, R0);
   __ LoadDImmediate(D5, 5.0, R0);
-  __ vstmd(DB_W, SP, D0, D4);  // Push D0 - D4 onto the stack, dec SP
-  __ vldmd(IA_W, SP, D5, D9);  // Pop stack into D5 - D9, inc SP
+  __ vstmd(DB_W, SP, D0, 5);  // Push D0 - D4 onto the stack, dec SP
+  __ vldmd(IA_W, SP, D5, 5);  // Pop stack into D5 - D9, inc SP
 
   // Load success value into R0
   __ mov(R0, ShifterOperand(42));
 
   // Check that 4.0 is in D9
   __ LoadDImmediate(D10, 4.0, R1);
   __ vcmpd(D9, D10);
   __ vmstat();
   __ mov(R0, ShifterOperand(0), NE);  // Put failure into R0 if NE
 
@@ skipping 2181 matching lines @@
   __ StoreIntoObject(R2,
                      FieldAddress(R2, GrowableObjectArray::data_offset()),
                      R1);
   __ PopList((1 << CTX) | (1 << LR));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM