Increases the number of ARM floating-point registers.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/simulator.h"
 #include "vm/runtime_entry.h"
@@ skipping 899 matching lines @@
 
 void Assembler::vstms(BlockAddressMode am, Register base,
                       SRegister first, SRegister last, Condition cond) {
   ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
   ASSERT(last > first);
   EmitMultiVSMemOp(cond, am, false, base, first, last - first + 1);
 }
 
 
 void Assembler::vldmd(BlockAddressMode am, Register base,
-                      DRegister first, DRegister last, Condition cond) {
+                      DRegister first, intptr_t count, Condition cond) {
   ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
-  ASSERT(last > first);
-  EmitMultiVDMemOp(cond, am, true, base, first, last - first + 1);
+  ASSERT(count <= 16);
+  ASSERT(first + count <= kNumberOfDRegisters);
+  EmitMultiVDMemOp(cond, am, true, base, first, count);
 }
 
 
 void Assembler::vstmd(BlockAddressMode am, Register base,
-                      DRegister first, DRegister last, Condition cond) {
+                      DRegister first, intptr_t count, Condition cond) {
   ASSERT((am == IA) || (am == IA_W) || (am == DB_W));
-  ASSERT(last > first);
-  EmitMultiVDMemOp(cond, am, false, base, first, last - first + 1);
+  ASSERT(count <= 16);
+  ASSERT(first + count <= kNumberOfDRegisters);
+  EmitMultiVDMemOp(cond, am, false, base, first, count);
 }
 
 
 void Assembler::EmitVFPsss(Condition cond, int32_t opcode,
                            SRegister sd, SRegister sn, SRegister sm) {
   ASSERT(sd != kNoSRegister);
   ASSERT(sn != kNoSRegister);
   ASSERT(sm != kNoSRegister);
   ASSERT(cond != kNoCondition);
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
@@ skipping 1332 matching lines @@
 }
 
 
 void Assembler::EnterCallRuntimeFrame(intptr_t frame_space) {
   // Preserve volatile CPU registers.
   EnterFrame(kDartVolatileCpuRegs | (1 << FP) | (1 << LR), 0);
 
   // Preserve all volatile FPU registers.
   DRegister firstv = EvenDRegisterOf(kDartFirstVolatileFpuReg);
   DRegister lastv = OddDRegisterOf(kDartLastVolatileFpuReg);
-  vstmd(DB_W, SP, firstv, lastv);
+  if ((lastv - firstv + 1) >= 16) {
+    DRegister mid = static_cast<DRegister>(firstv + 16);
+    vstmd(DB_W, SP, mid, lastv - mid + 1);
+    vstmd(DB_W, SP, firstv, 16);
+  } else {
+    vstmd(DB_W, SP, firstv, lastv - firstv + 1);
+  }
 
   ReserveAlignedFrameSpace(frame_space);
 }
 
 
 void Assembler::LeaveCallRuntimeFrame() {
   // SP might have been modified to reserve space for arguments
   // and ensure proper alignment of the stack frame.
   // We need to restore it before restoring registers.
   const intptr_t kPushedRegistersSize =
       kDartVolatileCpuRegCount * kWordSize +
       kDartVolatileFpuRegCount * 2 * kWordSize;
   AddImmediate(SP, FP, -kPushedRegistersSize);
 
   // Restore all volatile FPU registers.
   DRegister firstv = EvenDRegisterOf(kDartFirstVolatileFpuReg);
   DRegister lastv = OddDRegisterOf(kDartLastVolatileFpuReg);
-  vldmd(IA_W, SP, firstv, lastv);
+  if ((lastv - firstv + 1) > 16) {
+    DRegister mid = static_cast<DRegister>(firstv + 16);
+    vldmd(IA_W, SP, firstv, 16);
+    vldmd(IA_W, SP, mid, lastv - mid + 1);
+  } else {
+    vldmd(IA_W, SP, firstv, lastv - firstv + 1);
+  }
 
   // Restore volatile CPU registers.
   LeaveFrame(kDartVolatileCpuRegs | (1 << FP) | (1 << LR));
 }
 
 
 void Assembler::CallRuntime(const RuntimeEntry& entry) {
   entry.Call(this);
 }
 
@@ skipping 209 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM