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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include <math.h> // for isnan. | 5 #include <math.h> // for isnan. |
| 6 #include <setjmp.h> | 6 #include <setjmp.h> |
| 7 #include <stdlib.h> | 7 #include <stdlib.h> |
| 8 | 8 |
| 9 #include "vm/globals.h" | 9 #include "vm/globals.h" |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
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| 2497 set_sregister_bits(sd, ReadW(addr, instr)); | 2497 set_sregister_bits(sd, ReadW(addr, instr)); |
| 2498 } else { | 2498 } else { |
| 2499 // Format(instr, "vstms'cond'pu 'rn'w, 'slist"); | 2499 // Format(instr, "vstms'cond'pu 'rn'w, 'slist"); |
| 2500 WriteW(addr, get_sregister_bits(sd), instr); | 2500 WriteW(addr, get_sregister_bits(sd), instr); |
| 2501 } | 2501 } |
| 2502 addr += 4; | 2502 addr += 4; |
| 2503 } | 2503 } |
| 2504 } else { | 2504 } else { |
| 2505 int32_t regs_cnt = imm_val >> 1; | 2505 int32_t regs_cnt = imm_val >> 1; |
| 2506 int32_t start = (instr->Bit(22) << 4) | instr->Bits(12, 4); | 2506 int32_t start = (instr->Bit(22) << 4) | instr->Bits(12, 4); |
| 2507 for (int i = start; i < start + regs_cnt; i++) { | 2507 if ((regs_cnt <= 16) && (start + regs_cnt <= kNumberOfDRegisters)) { |
| 2508 DRegister dd = static_cast<DRegister>(i); | 2508 for (int i = start; i < start + regs_cnt; i++) { |
| 2509 if (instr->Bit(20) == 1) { | 2509 DRegister dd = static_cast<DRegister>(i); |
| 2510 // Format(instr, "vldmd'cond'pu 'rn'w, 'dlist"); | 2510 if (instr->Bit(20) == 1) { |
| 2511 int64_t dd_val = Utils::LowHighTo64Bits(ReadW(addr, instr), | 2511 // Format(instr, "vldmd'cond'pu 'rn'w, 'dlist"); |
| 2512 ReadW(addr + 4, instr)); | 2512 int64_t dd_val = Utils::LowHighTo64Bits(ReadW(addr, instr), |
| 2513 set_dregister_bits(dd, dd_val); | 2513 ReadW(addr + 4, instr)); |
| 2514 } else { | 2514 set_dregister_bits(dd, dd_val); |
| 2515 // Format(instr, "vstmd'cond'pu 'rn'w, 'dlist"); | 2515 } else { |
| 2516 int64_t dd_val = get_dregister_bits(dd); | 2516 // Format(instr, "vstmd'cond'pu 'rn'w, 'dlist"); |
| 2517 WriteW(addr, Utils::Low32Bits(dd_val), instr); | 2517 int64_t dd_val = get_dregister_bits(dd); |
| 2518 WriteW(addr + 4, Utils::High32Bits(dd_val), instr); | 2518 WriteW(addr, Utils::Low32Bits(dd_val), instr); |
| 2519 WriteW(addr + 4, Utils::High32Bits(dd_val), instr); |
| 2520 } |
| 2521 addr += 8; |
| 2519 } | 2522 } |
| 2520 addr += 8; | 2523 } else { |
| 2524 UnimplementedInstruction(instr); |
| 2521 } | 2525 } |
| 2522 } | 2526 } |
| 2523 } | 2527 } |
| 2524 } else { | 2528 } else { |
| 2525 UnimplementedInstruction(instr); | 2529 UnimplementedInstruction(instr); |
| 2526 } | 2530 } |
| 2527 } | 2531 } |
| 2528 | 2532 |
| 2529 | 2533 |
| 2530 void Simulator::DecodeType7(Instr* instr) { | 2534 void Simulator::DecodeType7(Instr* instr) { |
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| 3626 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); | 3630 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); |
| 3627 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); | 3631 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); |
| 3628 buf->Longjmp(); | 3632 buf->Longjmp(); |
| 3629 } | 3633 } |
| 3630 | 3634 |
| 3631 } // namespace dart | 3635 } // namespace dart |
| 3632 | 3636 |
| 3633 #endif // !defined(HOST_ARCH_ARM) | 3637 #endif // !defined(HOST_ARCH_ARM) |
| 3634 | 3638 |
| 3635 #endif // defined TARGET_ARCH_ARM | 3639 #endif // defined TARGET_ARCH_ARM |
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