Recognize Math's min and max function for doubles and inline the operation.

runtime/vm/intermediate_language_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intermediate_language.h"
 
 #include "lib/error.h"
@@ skipping 3067 matching lines @@
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
 void MathSqrtInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   __ sqrtd(locs()->out().fpu_reg(), locs()->in(0).fpu_reg());
 }
 
 
+LocationSummary* MathMinMaxInstr::MakeLocationSummary() const {
+  if (result_cid() == kDoubleCid) {
+    const intptr_t kNumInputs = 2;
+    const intptr_t kNumTemps = 1;
+    LocationSummary* summary =
+        new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
+    summary->set_in(0, Location::RequiresFpuRegister());
+    summary->set_in(1, Location::RequiresFpuRegister());
+    summary->set_temp(0, Location::RequiresRegister());
+    summary->set_out(Location::RequiresFpuRegister());
+    return summary;
+  }
+  ASSERT(result_cid() == kSmiCid);
+  UNIMPLEMENTED();
+  return NULL;
+}
+
+
+void MathMinMaxInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
+  if (result_cid() == kDoubleCid) {
+    Label done, is_nan, is_left;
+    DRegister left = locs()->in(0).fpu_reg();
+    DRegister right = locs()->in(1).fpu_reg();
+    DRegister result = locs()->out().fpu_reg();
+    Register temp = locs()->temp(0).reg();
+    __ cund(left, right);
+    __ bc1t(&is_nan);
+    if (op_kind() == MethodRecognizer::kMathMin) {
+      __ coltd(left, right);
+    } else {
+      ASSERT(op_kind() == MethodRecognizer::kMathMax);
+      __ coltd(right, left);
+    }
+    // TODO(zra): Add conditional moves.
+    __ bc1t(&is_left);
+    __ movd(result, right);
+    __ b(&done);
+    __ Bind(&is_left);
+    __ movd(result, right);
+    __ b(&done);
+    __ Bind(&is_nan);
+    __ LoadImmediate(result, NAN);
+    __ Bind(&done);
+    return;
+  }
+  ASSERT(result_cid() == kSmiCid);
+  UNIMPLEMENTED();
+}
+
+
 LocationSummary* UnarySmiOpInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresRegister());
   // We make use of 3-operand instructions by not requiring result register
   // to be identical to first input register as on Intel.
   summary->set_out(Location::RequiresRegister());
   return summary;
@@ skipping 132 matching lines @@
   result->set_in(0, Location::FpuRegisterLocation(D6));
   if (InputCount() == 2) {
     result->set_in(1, Location::FpuRegisterLocation(D7));
   }
   result->set_out(Location::FpuRegisterLocation(D0));
   return result;
 }
 
 
 void InvokeMathCFunctionInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  // For pow-function return NAN if exponent is NAN.
+  // For pow-function return NaN if exponent is NaN.
   Label do_call, skip_call;
   if (recognized_kind() == MethodRecognizer::kDoublePow) {
     DRegister exp = locs()->in(1).fpu_reg();
     __ cund(exp, exp);
     __ bc1f(&do_call);
     // Exponent is NaN, return NaN.
     __ movd(locs()->out().fpu_reg(), exp);
     __ b(&skip_call);
   }
   __ Bind(&do_call);
@@ skipping 522 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS