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Side by Side Diff: runtime/vm/disassembler_arm.cc

Issue 19776007: Enables a SIMD test for ARM. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/disassembler.h" 5 #include "vm/disassembler.h"
6 6
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
8 #if defined(TARGET_ARCH_ARM) 8 #if defined(TARGET_ARCH_ARM)
9 #include "platform/assert.h" 9 #include "platform/assert.h"
10 10
(...skipping 440 matching lines...) Expand 10 before | Expand all | Expand 10 after
451 ASSERT(STRING_STARTS_WITH(format, "immd")); 451 ASSERT(STRING_STARTS_WITH(format, "immd"));
452 buffer_pos_ += OS::SNPrint(current_position_in_buffer(), 452 buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
453 remaining_size_in_buffer(), 453 remaining_size_in_buffer(),
454 "%g", 454 "%g",
455 instr->ImmDoubleField()); 455 instr->ImmDoubleField());
456 return 4; 456 return 4;
457 } else if (format[3] == '1') { 457 } else if (format[3] == '1') {
458 ASSERT(STRING_STARTS_WITH(format, "imm12_4")); 458 ASSERT(STRING_STARTS_WITH(format, "imm12_4"));
459 immed16 = instr->BkptField(); 459 immed16 = instr->BkptField();
460 } else { 460 } else {
461 ASSERT(STRING_STARTS_WITH(format, "imm4_12")); 461 ASSERT(format[3] == '4');
462 immed16 = instr->MovwField(); 462 if (format[5] == 'v') {
463 ASSERT(STRING_STARTS_WITH(format, "imm4_vdup"));
464 int32_t idx = -1;
465 int32_t imm4 = instr->Bits(16, 4);
466 if ((imm4 & 1) != 0) idx = imm4 >> 1;
467 else if ((imm4 & 2) != 0) idx = imm4 >> 2;
468 else if ((imm4 & 4) != 0) idx = imm4 >> 3;
469 buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
470 remaining_size_in_buffer(),
471 "%d",
472 idx);
473 return 9;
474 } else {
475 ASSERT(STRING_STARTS_WITH(format, "imm4_12"));
476 immed16 = instr->MovwField();
477 }
463 } 478 }
464 buffer_pos_ += OS::SNPrint(current_position_in_buffer(), 479 buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
465 remaining_size_in_buffer(), 480 remaining_size_in_buffer(),
466 "0x%x", 481 "0x%x",
467 immed16); 482 immed16);
468 return 7; 483 return 7;
469 } 484 }
470 case 'l': { // 'l: branch and link 485 case 'l': { // 'l: branch and link
471 if (instr->HasLink()) { 486 if (instr->HasLink()) {
472 Print("l"); 487 Print("l");
(...skipping 827 matching lines...) Expand 10 before | Expand all | Expand 10 after
1300 Format(instr, "vsubq'sz 'qd, 'qn, 'qm"); 1315 Format(instr, "vsubq'sz 'qd, 'qn, 'qm");
1301 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) && 1316 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 0) &&
1302 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) { 1317 (instr->Bits(23, 2) == 0) && (instr->Bit(21) == 1)) {
1303 Format(instr, "vsubqs 'qd, 'qn, 'qm"); 1318 Format(instr, "vsubqs 'qd, 'qn, 'qm");
1304 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) && 1319 } else if ((instr->Bits(8, 4) == 9) && (instr->Bit(4) == 1) &&
1305 (instr->Bits(23, 2) == 0)) { 1320 (instr->Bits(23, 2) == 0)) {
1306 Format(instr, "vmulq'sz 'qd, 'qn, 'qm"); 1321 Format(instr, "vmulq'sz 'qd, 'qn, 'qm");
1307 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) && 1322 } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) &&
1308 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) { 1323 (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) {
1309 Format(instr, "vmulqs 'qd, 'qn, 'qm"); 1324 Format(instr, "vmulqs 'qd, 'qn, 'qm");
1325 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1326 (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 2)) {
1327 Format(instr, "veorq 'qd, 'qn, 'qm");
1328 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
1329 (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {
1330 if (instr->QmField() == instr->QnField()) {
1331 Format(instr, "vmovq 'qd, 'qm");
1332 } else {
1333 Format(instr, "vorrq 'qd, 'qm");
1334 }
1335 } else if ((instr->Bits(8, 4) == 12) && (instr->Bit(4) == 0) &&
1336 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
1337 (instr->Bit(7) == 0)) {
1338 int32_t imm4 = instr->Bits(16, 4);
1339 if (imm4 & 1) {
1340 Format(instr, "vdupb 'qd, 'dm['imm4_vdup]");
1341 } else if (imm4 & 2) {
1342 Format(instr, "vduph 'qd, 'dm['imm4_vdup]");
1343 } else if (imm4 & 4) {
1344 Format(instr, "vdupw 'qd, 'dm['imm4_vdup]");
1345 } else {
1346 Unknown(instr);
1347 }
1310 } else { 1348 } else {
1311 Unknown(instr); 1349 Unknown(instr);
1312 } 1350 }
1313 } else { 1351 } else {
1314 if ((instr->Bits(23, 2) == 3) && (instr->Bits(20, 2) == 3) && 1352 if ((instr->Bits(23, 2) == 3) && (instr->Bits(20, 2) == 3) &&
1315 (instr->Bits(10, 2) == 2) && (instr->Bit(4) == 0)) { 1353 (instr->Bits(10, 2) == 2) && (instr->Bit(4) == 0)) {
1316 Format(instr, "vtbl 'dd, 'dtbllist, 'dm"); 1354 Format(instr, "vtbl 'dd, 'dtbllist, 'dm");
1317 } else { 1355 } else {
1318 Unknown(instr); 1356 Unknown(instr);
1319 } 1357 }
(...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after
1416 human_buffer, 1454 human_buffer,
1417 sizeof(human_buffer), 1455 sizeof(human_buffer),
1418 pc); 1456 pc);
1419 pc += instruction_length; 1457 pc += instruction_length;
1420 } 1458 }
1421 } 1459 }
1422 1460
1423 } // namespace dart 1461 } // namespace dart
1424 1462
1425 #endif // defined TARGET_ARCH_ARM 1463 #endif // defined TARGET_ARCH_ARM
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