Enables a SIMD test for ARM.

runtime/vm/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm.h directly; use assembler.h instead.
 #endif
@@ skipping 426 matching lines @@
 
   // Floating point instructions (VFPv3-D16 and VFPv3-D32 profiles).
   void vmovsr(SRegister sn, Register rt, Condition cond = AL);
   void vmovrs(Register rt, SRegister sn, Condition cond = AL);
   void vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond = AL);
   void vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond = AL);
   void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL);
   void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL);
   void vmovs(SRegister sd, SRegister sm, Condition cond = AL);
   void vmovd(DRegister dd, DRegister dm, Condition cond = AL);
+  void vmovq(QRegister qd, QRegister qm);
 
   // Returns false if the immediate cannot be encoded.
   bool vmovs(SRegister sd, float s_imm, Condition cond = AL);
   bool vmovd(DRegister dd, double d_imm, Condition cond = AL);
 
   void vldrs(SRegister sd, Address ad, Condition cond = AL);
   void vstrs(SRegister sd, Address ad, Condition cond = AL);
   void vldrd(DRegister dd, Address ad, Condition cond = AL);
   void vstrd(DRegister dd, Address ad, Condition cond = AL);
 
@@ skipping 18 matching lines @@
   void vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL);
   void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL);
   void vmulqi(OperandSize sz, QRegister qd, QRegister qn, QRegister qm);
   void vmulqs(QRegister qd, QRegister qn, QRegister qm);
   void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL);
   void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL);
   void vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL);
   void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL);
   void vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL);
   void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL);
+  void veorq(QRegister qd, QRegister qn, QRegister qm);
+  void vorrq(QRegister qd, QRegister qn, QRegister qm);
 
   void vabss(SRegister sd, SRegister sm, Condition cond = AL);
   void vabsd(DRegister dd, DRegister dm, Condition cond = AL);
   void vnegs(SRegister sd, SRegister sm, Condition cond = AL);
   void vnegd(DRegister dd, DRegister dm, Condition cond = AL);
   void vsqrts(SRegister sd, SRegister sm, Condition cond = AL);
   void vsqrtd(DRegister dd, DRegister dm, Condition cond = AL);
 
   void vcvtsd(SRegister sd, DRegister dm, Condition cond = AL);
   void vcvtds(DRegister dd, SRegister sm, Condition cond = AL);
   void vcvtis(SRegister sd, SRegister sm, Condition cond = AL);
   void vcvtid(SRegister sd, DRegister dm, Condition cond = AL);
   void vcvtsi(SRegister sd, SRegister sm, Condition cond = AL);
   void vcvtdi(DRegister dd, SRegister sm, Condition cond = AL);
   void vcvtus(SRegister sd, SRegister sm, Condition cond = AL);
   void vcvtud(SRegister sd, DRegister dm, Condition cond = AL);
   void vcvtsu(SRegister sd, SRegister sm, Condition cond = AL);
   void vcvtdu(DRegister dd, SRegister sm, Condition cond = AL);
 
   void vcmps(SRegister sd, SRegister sm, Condition cond = AL);
   void vcmpd(DRegister dd, DRegister dm, Condition cond = AL);
   void vcmpsz(SRegister sd, Condition cond = AL);
   void vcmpdz(DRegister dd, Condition cond = AL);
   void vmstat(Condition cond = AL);  // VMRS APSR_nzcv, FPSCR
 
+  // Duplicates the operand of size sz at index idx from dm to all elements of
+  // qd. This is a special case of vtbl.
+  void vdup(OperandSize sz, QRegister qd, DRegister dm, int idx);
+
   // Each byte of dm is an index into the table of bytes formed by concatenating
   // a list of 'length' registers starting with dn. The result is placed in dd.
   void vtbl(DRegister dd, DRegister dn, int length, DRegister dm);
 
   // Branch instructions.
   void b(Label* label, Condition cond = AL);
   void bl(Label* label, Condition cond = AL);
   void bx(Register rm, Condition cond = AL);
   void blx(Register rm, Condition cond = AL);
 
@@ skipping 303 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_