Enables a SIMD test for ARM.

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
@@ skipping 2989 matching lines @@
         UnimplementedInstruction(instr);
       } else {
         UNREACHABLE();
       }
     } else if ((instr->Bits(8, 4) == 13) && (instr->Bit(4) == 1) &&
                (instr->Bits(23, 2) == 2) && (instr->Bit(21) == 0)) {
       // Format(instr, "vmul.F32 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f = s8n.data_[i].f * s8m.data_[i].f;
       }
+    } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
+               (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 2)) {
+      // Format(instr, "veorq 'qd, 'qn, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].u = s8n.data_[i].u ^ s8m.data_[i].u;
+      }
+    } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
+               (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {
+      if (qm == qn) {
+        // Format(instr, "vmovq 'qd, 'qm");
+        for (int i = 0; i < 4; i++) {
+          s8d.data_[i].u = s8m.data_[i].u;
+        }
+      } else {
+        // Format(instr, "vorrq 'qd, 'qm");
+        for (int i = 0; i < 4; i++) {
+          s8d.data_[i].u = s8n.data_[i].u | s8m.data_[i].u;
+        }
+      }
+    } else if ((instr->Bits(8, 4) == 12) && (instr->Bit(4) == 0) &&
+               (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
+               (instr->Bit(7) == 0)) {
+      DRegister dm = instr->DmField();
+      int64_t dm_value = get_dregister_bits(dm);
+      int32_t imm4 = instr->Bits(16, 4);
+      int32_t idx;
+      if (imm4 & 1) {

[regis, 2013/07/18 18:17:21]

Style: either ((imm4 & 1) == 1) or (((imm4 & 1) != 0)

[zra, 2013/07/18 18:32:08]

Done.

+        // Format(instr, "vdupb 'qd, 'dm['imm4_vdup]");
+        int8_t* dm_b = reinterpret_cast<int8_t*>(&dm_value);
+        idx = imm4 >> 1;
+        for (int i = 0; i < 16; i++) {
+          s8d_8[i] = dm_b[idx];
+        }
+      } else if (imm4 & 2) {

[regis, 2013/07/18 18:17:21]

ditto

[zra, 2013/07/18 18:32:08]

Done.

+        // Format(instr, "vduph 'qd, 'dm['imm4_vdup]");
+        int16_t* dm_h = reinterpret_cast<int16_t*>(&dm_value);
+        idx = imm4 >> 2;
+        for (int i = 0; i < 8; i++) {
+          s8d_16[i] = dm_h[idx];
+        }
+      } else if (imm4 & 4) {

[regis, 2013/07/18 18:17:21]

ditto

[zra, 2013/07/18 18:32:08]

Done.

+        // Format(instr, "vdupw 'qd, 'dm['imm4_vdup]");
+        int32_t* dm_w = reinterpret_cast<int32_t*>(&dm_value);
+        idx = imm4 >> 3;
+        for (int i = 0; i < 4; i++) {
+          s8d.data_[i].u = dm_w[idx];
+        }
+      } else {
+        UnimplementedInstruction(instr);
+      }
     } else {
       UnimplementedInstruction(instr);
     }
 
     set_qregister(qd, s8d);
   } else {
     // Q == 0, Uses 64-bit D registers.
     if ((instr->Bits(23, 2) == 3) && (instr->Bits(20, 2) == 3) &&
         (instr->Bits(10, 2) == 2) && (instr->Bit(4) == 0)) {
       // Format(instr, "vtbl 'dd, 'dtbllist, 'dm");
       DRegister dd = instr->DdField();
       DRegister dm = instr->DmField();
       int reg_count = instr->Bits(8, 2) + 1;
       int start = (instr->Bit(7) << 4) | instr->Bits(16, 4);
       int64_t table[4];
 
       for (int i = 0; i < reg_count; i++) {
         DRegister d = static_cast<DRegister>(start + i);
         table[i] = get_dregister_bits(d);
       }
       for (int i = reg_count; i < 4; i++) {
         table[i] = 0;
       }
 
-
       int64_t dm_value = get_dregister_bits(dm);
       int64_t result;
       int8_t* dm_bytes = reinterpret_cast<int8_t*>(&dm_value);
       int8_t* result_bytes = reinterpret_cast<int8_t*>(&result);
       int8_t* table_bytes = reinterpret_cast<int8_t*>(&table[0]);
       for (int i = 0; i < 8; i++) {
         int idx = dm_bytes[i];
         if ((idx >= 0) && (idx < 256)) {
           result_bytes[i] = table_bytes[idx];
         } else {
@@ skipping 243 matching lines @@
   set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
   set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM)
 
 #endif  // defined TARGET_ARCH_ARM