Collect both arguments for math's min/max static functions. Later that information will be used to …

runtime/vm/stub_code_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1524 matching lines @@
 // Generate inline cache check for 'num_args'.
 //  RA: return address
 //  S5: Inline cache data object.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
 // - If receiver is Smi -> load Smi class.
 // - If receiver is not-Smi -> load receiver's class.
 // - Check if 'num_args' (including receiver) match any IC data group.
 // - Match found -> jump to target.
 // - Match not found -> jump to IC miss.
-void StubCode::GenerateNArgsCheckInlineCacheStub(Assembler* assembler,
-                                                 intptr_t num_args) {
+void StubCode::GenerateNArgsCheckInlineCacheStub(
+    Assembler* assembler,
+    intptr_t num_args,
+    const RuntimeEntry& handle_ic_miss) {
   __ TraceSimMsg("NArgsCheckInlineCacheStub");
   ASSERT(num_args > 0);
 #if defined(DEBUG)
   { Label ok;
     // Check that the IC data array has NumberOfArgumentsChecked() == num_args.
     // 'num_args_tested' is stored as an untagged int.
     __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset()));
     __ BranchEqual(T0, num_args, &ok);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
@@ skipping 104 matching lines @@
   __ sw(S4, Address(SP, (num_slots - 2) * kWordSize));
   __ LoadImmediate(TMP, reinterpret_cast<intptr_t>(Object::null()));
   __ sw(TMP, Address(SP, (num_slots - 3) * kWordSize));
   // Push call arguments.
   for (intptr_t i = 0; i < num_args; i++) {
     __ lw(TMP1, Address(T1, -i * kWordSize));
     __ sw(TMP1, Address(SP, (num_slots - i - 4) * kWordSize));
   }
   // Pass IC data object.
   __ sw(S5, Address(SP, (num_slots - num_args - 4) * kWordSize));
-
-  if (num_args == 1) {
-    __ CallRuntime(kInlineCacheMissHandlerOneArgRuntimeEntry);
-  } else if (num_args == 2) {
-    __ CallRuntime(kInlineCacheMissHandlerTwoArgsRuntimeEntry);
-  } else if (num_args == 3) {
-    __ CallRuntime(kInlineCacheMissHandlerThreeArgsRuntimeEntry);
-  } else {
-    UNIMPLEMENTED();
-  }
+  __ CallRuntime(handle_ic_miss);
   __ TraceSimMsg("NArgsCheckInlineCacheStub return");
   // Pop returned code object into T3 (null if not found).
   // Restore arguments descriptor array and IC data array.
   __ lw(T3, Address(SP, (num_slots - 3) * kWordSize));
   __ lw(S4, Address(SP, (num_slots - 2) * kWordSize));
   __ lw(S5, Address(SP, (num_slots - 1) * kWordSize));
   // Remove the call arguments pushed earlier, including the IC data object
   // and the arguments descriptor array.
   __ addiu(SP, SP, Immediate(num_slots * kWordSize));
   __ LeaveStubFrame();
@@ skipping 51 matching lines @@
 //  RA: Return address.
 //  S5: Inline cache data object.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
 // 2 .. (length - 1): group of checks, each check containing:
 //   - N classes.
 //   - 1 target function.
 void StubCode::GenerateOneArgCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 1);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
 }
 
 
 void StubCode::GenerateTwoArgsCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry);
 }
 
 
 void StubCode::GenerateThreeArgsCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
-  GenerateNArgsCheckInlineCacheStub(assembler, 3);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 3, kInlineCacheMissHandlerThreeArgsRuntimeEntry);
 }
 
 
 void StubCode::GenerateOneArgOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(assembler, 1);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
 }
 
 
 void StubCode::GenerateTwoArgsOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(assembler, 2);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry);
 }
 
 
 void StubCode::GenerateThreeArgsOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(assembler, 3);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 3, kInlineCacheMissHandlerThreeArgsRuntimeEntry);
 }
 
 
 void StubCode::GenerateClosureCallInlineCacheStub(Assembler* assembler) {
-  GenerateNArgsCheckInlineCacheStub(assembler, 1);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
 }
 
 
 void StubCode::GenerateMegamorphicCallStub(Assembler* assembler) {
-  GenerateNArgsCheckInlineCacheStub(assembler, 1);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
 }
 
 
 // Intermediary stub between a static call and its target. ICData contains
 // the target function and the call count.
 // S5: ICData
-void StubCode::GenerateUnoptimizedStaticCallStub(Assembler* assembler) {
+void StubCode::GenerateZeroArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, T0);
   __ TraceSimMsg("UnoptimizedStaticCallStub");
 #if defined(DEBUG)
   { Label ok;
     // Check that the IC data array has NumberOfArgumentsChecked() == 0.
     // 'num_args_tested' is stored as an untagged int.
     __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset()));
     __ beq(T0, ZR, &ok);
     __ Stop("Incorrect IC data for unoptimized static call");
     __ Bind(&ok);
@@ skipping 62 matching lines @@
   // T4: target code.
   __ lw(T3, FieldAddress(T4, Code::instructions_offset()));
   __ AddImmediate(T3, Instructions::HeaderSize() - kHeapObjectTag);
   __ jr(T3);
   // Load arguments descriptor into S4.
   __ delay_slot()->
       lw(S4,  FieldAddress(S5, ICData::arguments_descriptor_offset()));
 }
 
 
+void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) {
+  GenerateUsageCounterIncrement(assembler, T0);
+  GenerateNArgsCheckInlineCacheStub(
+      assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry);
+}
+
+
 void StubCode::GenerateBreakpointRuntimeStub(Assembler* assembler) {
   __ Unimplemented("BreakpointRuntime stub");
 }
 
 
 //  RA: return address (Dart code).
 //  S5: IC data (unoptimized static call).
 void StubCode::GenerateBreakpointStaticStub(Assembler* assembler) {
   __ TraceSimMsg("BreakpointStaticStub");
   // Create a stub frame as we are pushing some objects on the stack before
@@ skipping 477 matching lines @@
   __ lw(left, Address(SP, 1 * kWordSize));
   __ lw(temp2, Address(SP, 2 * kWordSize));
   __ lw(temp1, Address(SP, 3 * kWordSize));
   __ Ret();
   __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS