runtime/vm/disassembler_arm.cc - Issue 19773017: Adds ARM SIMD instructions.

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Unified Diff: runtime/vm/disassembler_arm.cc

Issue 19773017: Adds ARM SIMD instructions. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/

Patch Set: Created 7 years, 5 months ago

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Index: runtime/vm/disassembler_arm.cc

===================================================================

--- runtime/vm/disassembler_arm.cc (revision 25244)

+++ runtime/vm/disassembler_arm.cc (working copy)

@@ -1335,6 +1335,19 @@

} else {

Format(instr, "vorrq 'qd, 'qm");

}

+ } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&

+ (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {

+ Format(instr, "vminqs 'qd, 'qn, 'qm");

+ } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&

+ (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {

+ Format(instr, "vmaxqs 'qd, 'qn, 'qm");

+ } else if ((instr->Bits(7, 5) == 10) && (instr->Bit(4) == 0) &&

+ (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&

+ (instr->Bits(16, 4) == 11)) {

+ Format(instr, "vrecpeqs 'qd, 'qm");

+ } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 1) &&

+ (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {

+ Format(instr, "vrecpsqs 'qd, 'qn, 'qm");

} else if ((instr->Bits(8, 4) == 12) && (instr->Bit(4) == 0) &&

(instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&

(instr->Bit(7) == 0)) {

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