Subzero, MIPS32: Implement logical instructions ashr, lshr, shl

tests_lit/llvm2ice_tests/shift.ll

 ; This is a test of C-level conversion operations that clang lowers
 ; into pairs of shifts.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -Om1 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command %p2i --filetype=asm --assemble \
 ; RUN:   --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command FileCheck --check-prefix ARM32 %s
 
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command %p2i --filetype=asm --assemble \
 ; RUN:   --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
 ; RUN:   | %if --need=target_ARM32 --need=allow_dump \
 ; RUN:   --command FileCheck --check-prefix ARM32 %s
 
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target mips32 -i %s --args -O2 --skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32 %s
+
+; RUN: %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command %p2i --filetype=asm --assemble \
+; RUN:   --disassemble --target mips32 -i %s --args -Om1 --skip-unimplemented \
+; RUN:   | %if --need=target_MIPS32 --need=allow_dump \
+; RUN:   --command FileCheck --check-prefix MIPS32 %s
 
 @i1 = internal global [4 x i8] zeroinitializer, align 4
 @i2 = internal global [4 x i8] zeroinitializer, align 4
 @u1 = internal global [4 x i8] zeroinitializer, align 4
 
 define internal void @conv1() {
 entry:
   %__0 = bitcast [4 x i8]* @u1 to i32*
   %v0 = load i32, i32* %__0, align 1
   %sext = shl i32 %v0, 24
@@ skipping 29 matching lines @@
 ; ARM32: lsr {{.*}}, #16
 
 define internal i32 @shlImmLarge(i32 %val) {
 entry:
   %result = shl i32 %val, 257
   ret i32 %result
 }
 ; CHECK-LABEL: shlImmLarge
 ; CHECK: shl {{.*}},0x1
 
+; MIPS32-LABEL: shlImmLarge
+; MIPS32: sllv
+
 define internal i32 @shlImmNeg(i32 %val) {
 entry:
   %result = shl i32 %val, -1
   ret i32 %result
 }
 ; CHECK-LABEL: shlImmNeg
 ; CHECK: shl {{.*}},0xff
 
+; MIPS32-LABEL: shlImmNeg
+; MIPS32: sllv
+
 define internal i32 @lshrImmLarge(i32 %val) {
 entry:
   %result = lshr i32 %val, 257
   ret i32 %result
 }
 ; CHECK-LABEL: lshrImmLarge
 ; CHECK: shr {{.*}},0x1
 
+; MIPS32-LABEL: lshrImmLarge
+; MIPS32: srlv
+
 define internal i32 @lshrImmNeg(i32 %val) {
 entry:
   %result = lshr i32 %val, -1
   ret i32 %result
 }
 ; CHECK-LABEL: lshrImmNeg
 ; CHECK: shr {{.*}},0xff
 
+; MIPS32-LABEL: lshrImmNeg
+; MIPS32: srlv
+
 define internal i32 @ashrImmLarge(i32 %val) {
 entry:
   %result = ashr i32 %val, 257
   ret i32 %result
 }
 ; CHECK-LABEL: ashrImmLarge
 ; CHECK: sar {{.*}},0x1
 
+; MIPS32-LABEL: ashrImmLarge
+; MIPS32: srav
+
 define internal i32 @ashrImmNeg(i32 %val) {
 entry:
   %result = ashr i32 %val, -1
   ret i32 %result
 }
 ; CHECK-LABEL: ashrImmNeg
 ; CHECK: sar {{.*}},0xff
 
+; MIPS32-LABEL: ashrImmNeg
+; MIPS32: srav
+
 define internal i64 @shlImm64One(i64 %val) {
 entry:
   %result = shl i64 %val, 1
   ret i64 %result
 }
 ; CHECK-LABEL: shlImm64One
 ; CHECK: shl {{.*}},1
 
 define internal i64 @shlImm64LessThan32(i64 %val) {
 entry:
@@ skipping 81 matching lines @@
 ; CHECK-NOT: shrd
 
 define internal i64 @ashrImm64GreaterThan32(i64 %val) {
 entry:
   %result = ashr i64 %val, 40
   ret i64 %result
 }
 ; CHECK-LABEL: ashrImm64GreaterThan32
 ; CHECK: sar {{.*}},0x1f
 ; CHECK: shrd {{.*}},0x8