Subzero, MIPS32: Implement logical instructions ashr, lshr, shl

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 674 matching lines @@
     lowerInt64Arithmetic(Instr, Instr->getDest(), Src0, Src1);
     return;
   }
   if (isVectorType(Dest->getType())) {
     UnimplementedLoweringError(this, Instr);
     return;
   }
   switch (Instr->getOp()) {
   default:
     break;
-  case InstArithmetic::Shl:
-  case InstArithmetic::Lshr:
-  case InstArithmetic::Ashr:
   case InstArithmetic::Udiv:
   case InstArithmetic::Sdiv:
   case InstArithmetic::Urem:
   case InstArithmetic::Srem:
   case InstArithmetic::Fadd:
   case InstArithmetic::Fsub:
   case InstArithmetic::Fmul:
   case InstArithmetic::Fdiv:
   case InstArithmetic::Frem:
     UnimplementedLoweringError(this, Instr);
@@ skipping 27 matching lines @@
     return;
   case InstArithmetic::Sub:
     _subu(T, Src0R, Src1R);
     _mov(Dest, T);
     return;
   case InstArithmetic::Mul: {
     _mul(T, Src0R, Src1R);
     _mov(Dest, T);
     return;
   }
-  case InstArithmetic::Shl:
-    break;
-  case InstArithmetic::Lshr:
-    break;
-  case InstArithmetic::Ashr:
-    break;
+  case InstArithmetic::Shl: {
+    _sllv(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  }
+  case InstArithmetic::Lshr: {
+    _srlv(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  }
+  case InstArithmetic::Ashr: {
+    _srav(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  }
   case InstArithmetic::Udiv:
     break;
   case InstArithmetic::Sdiv:
     break;
   case InstArithmetic::Urem:
     break;
   case InstArithmetic::Srem:
     break;
   case InstArithmetic::Fadd:
     break;
@@ skipping 719 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice