Experimental parser: merge r19949

src/a64/macro-assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 35 matching lines @@
 MacroAssembler::MacroAssembler(Isolate* arg_isolate,
                                byte * buffer,
                                unsigned buffer_size)
     : Assembler(arg_isolate, buffer, buffer_size),
       generating_stub_(false),
 #if DEBUG
       allow_macro_instructions_(true),
 #endif
       has_frame_(false),
       use_real_aborts_(true),
-      sp_(jssp), tmp0_(ip0), tmp1_(ip1), fptmp0_(fp_scratch) {
+      sp_(jssp), tmp_list_(ip0, ip1), fptmp_list_(fp_scratch) {
   if (isolate() != NULL) {
     code_object_ = Handle<Object>(isolate()->heap()->undefined_value(),
                                   isolate());
   }
 }
 
 
 void MacroAssembler::LogicalMacro(const Register& rd,
                                   const Register& rn,
                                   const Operand& operand,
                                   LogicalOp op) {
+  UseScratchRegisterScope temps(this);
+
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    Logical(rd, rn, Tmp0(), op);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    Logical(rd, rn, temp, op);
 
   } else if (operand.IsImmediate()) {
     int64_t immediate = operand.immediate();
     unsigned reg_size = rd.SizeInBits();
     ASSERT(rd.Is64Bits() || is_uint32(immediate));
 
     // If the operation is NOT, invert the operation and immediate.
     if ((op & NOT) == NOT) {
       op = static_cast<LogicalOp>(op & ~NOT);
       immediate = ~immediate;
@@ skipping 37 matching lines @@
           UNREACHABLE();
       }
     }
 
     unsigned n, imm_s, imm_r;
     if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
       // Immediate can be encoded in the instruction.
       LogicalImmediate(rd, rn, n, imm_s, imm_r, op);
     } else {
       // Immediate can't be encoded: synthesize using move immediate.
-      Register temp = AppropriateTempFor(rn);
+      Register temp = temps.AcquireSameSizeAs(rn);
       Mov(temp, immediate);
       if (rd.Is(csp)) {
         // If rd is the stack pointer we cannot use it as the destination
         // register so we use the temp register as an intermediate again.
         Logical(temp, rn, temp, op);
         Mov(csp, temp);
       } else {
         Logical(rd, rn, temp, op);
       }
     }
 
   } else if (operand.IsExtendedRegister()) {
     ASSERT(operand.reg().SizeInBits() <= rd.SizeInBits());
     // Add/sub extended supports shift <= 4. We want to support exactly the
     // same modes here.
     ASSERT(operand.shift_amount() <= 4);
     ASSERT(operand.reg().Is64Bits() ||
            ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitExtendShift(temp, operand.reg(), operand.extend(),
                     operand.shift_amount());
     Logical(rd, rn, temp, op);
 
   } else {
     // The operand can be encoded in the instruction.
     ASSERT(operand.IsShiftedRegister());
     Logical(rd, rn, operand, op);
   }
 }
@@ skipping 43 matching lines @@
     uint64_t ignored_halfword = 0;
     bool invert_move = false;
     // If the number of 0xffff halfwords is greater than the number of 0x0000
     // halfwords, it's more efficient to use move-inverted.
     if (CountClearHalfWords(~imm, reg_size) >
         CountClearHalfWords(imm, reg_size)) {
       ignored_halfword = 0xffffL;
       invert_move = true;
     }
 
-    // Mov instructions can't move value into the stack pointer, so set up a
-    // temporary register, if needed.
-    Register temp = rd.IsSP() ? AppropriateTempFor(rd) : rd;
+    // Mov instructions can't move immediate values into the stack pointer, so
+    // set up a temporary register, if needed.
+    UseScratchRegisterScope temps(this);
+    Register temp = rd.IsSP() ? temps.AcquireSameSizeAs(rd) : rd;
 
     // Iterate through the halfwords. Use movn/movz for the first non-ignored
     // halfword, and movk for subsequent halfwords.
     ASSERT((reg_size % 16) == 0);
     bool first_mov_done = false;
     for (unsigned i = 0; i < (rd.SizeInBits() / 16); i++) {
       uint64_t imm16 = (imm >> (16 * i)) & 0xffffL;
       if (imm16 != ignored_halfword) {
         if (!first_mov_done) {
           if (invert_move) {
@@ skipping 17 matching lines @@
     }
   }
 }
 
 
 void MacroAssembler::Mov(const Register& rd,
                          const Operand& operand,
                          DiscardMoveMode discard_mode) {
   ASSERT(allow_macro_instructions_);
   ASSERT(!rd.IsZero());
+
   // Provide a swap register for instructions that need to write into the
   // system stack pointer (and can't do this inherently).
-  Register dst = (rd.Is(csp)) ? (Tmp1()) : (rd);
+  UseScratchRegisterScope temps(this);
+  Register dst = (rd.IsSP()) ? temps.AcquireSameSizeAs(rd) : rd;
 
   if (operand.NeedsRelocation()) {
     LoadRelocated(dst, operand);
 
   } else if (operand.IsImmediate()) {
     // Call the macro assembler for generic immediates.
     Mov(dst, operand.immediate());
 
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
     // Emit a shift instruction if moving a shifted register. This operation
@@ skipping 20 matching lines @@
     if (!rd.Is(operand.reg()) || (rd.Is32Bits() &&
                                   (discard_mode == kDontDiscardForSameWReg))) {
       Assembler::mov(rd, operand.reg());
     }
     // This case can handle writes into the system stack pointer directly.
     dst = rd;
   }
 
   // Copy the result to the system stack pointer.
   if (!dst.Is(rd)) {
-    ASSERT(rd.IsZero());
-    ASSERT(dst.Is(Tmp1()));
+    ASSERT(rd.IsSP());
     Assembler::mov(rd, dst);
   }
 }
 
 
 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) {
   ASSERT(allow_macro_instructions_);
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    Mvn(rd, Tmp0());
+    LoadRelocated(rd, operand);
+    mvn(rd, rd);
 
   } else if (operand.IsImmediate()) {
     // Call the macro assembler for generic immediates.
     Mov(rd, ~operand.immediate());
 
   } else if (operand.IsExtendedRegister()) {
     // Emit two instructions for the extend case. This differs from Mov, as
     // the extend and invert can't be achieved in one instruction.
-    Register temp = AppropriateTempFor(rd, operand.reg());
-    EmitExtendShift(temp, operand.reg(), operand.extend(),
+    EmitExtendShift(rd, operand.reg(), operand.extend(),
                     operand.shift_amount());
-    mvn(rd, temp);
+    mvn(rd, rd);
 
   } else {
-    // Otherwise, emit a register move only if the registers are distinct.
-    // If the jssp is an operand, add #0 is emitted, otherwise, orr #0.
     mvn(rd, operand);
   }
 }
 
 
 unsigned MacroAssembler::CountClearHalfWords(uint64_t imm, unsigned reg_size) {
   ASSERT((reg_size % 8) == 0);
   int count = 0;
   for (unsigned i = 0; i < (reg_size / 16); i++) {
     if ((imm & 0xffff) == 0) {
       count++;
     }
     imm >>= 16;
   }
   return count;
 }
 
 
 // The movz instruction can generate immediates containing an arbitrary 16-bit
 // half-word, with remaining bits clear, eg. 0x00001234, 0x0000123400000000.
 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) {
-  ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
+  ASSERT((reg_size == kXRegSizeInBits) || (reg_size == kWRegSizeInBits));
   return CountClearHalfWords(imm, reg_size) >= ((reg_size / 16) - 1);
 }
 
 
 // The movn instruction can generate immediates containing an arbitrary 16-bit
 // half-word, with remaining bits set, eg. 0xffff1234, 0xffff1234ffffffff.
 bool MacroAssembler::IsImmMovn(uint64_t imm, unsigned reg_size) {
   return IsImmMovz(~imm, reg_size);
 }
 
 
 void MacroAssembler::ConditionalCompareMacro(const Register& rn,
                                              const Operand& operand,
                                              StatusFlags nzcv,
                                              Condition cond,
                                              ConditionalCompareOp op) {
   ASSERT((cond != al) && (cond != nv));
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    ConditionalCompareMacro(rn, Tmp0(), nzcv, cond, op);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    ConditionalCompareMacro(rn, temp, nzcv, cond, op);
 
   } else if ((operand.IsShiftedRegister() && (operand.shift_amount() == 0)) ||
       (operand.IsImmediate() && IsImmConditionalCompare(operand.immediate()))) {
     // The immediate can be encoded in the instruction, or the operand is an
     // unshifted register: call the assembler.
     ConditionalCompare(rn, operand, nzcv, cond, op);
 
   } else {
     // The operand isn't directly supported by the instruction: perform the
     // operation on a temporary register.
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     ConditionalCompare(rn, temp, nzcv, cond, op);
   }
 }
 
 
 void MacroAssembler::Csel(const Register& rd,
                           const Register& rn,
                           const Operand& operand,
                           Condition cond) {
   ASSERT(allow_macro_instructions_);
   ASSERT(!rd.IsZero());
   ASSERT((cond != al) && (cond != nv));
   if (operand.IsImmediate()) {
     // Immediate argument. Handle special cases of 0, 1 and -1 using zero
     // register.
     int64_t imm = operand.immediate();
     Register zr = AppropriateZeroRegFor(rn);
     if (imm == 0) {
       csel(rd, rn, zr, cond);
     } else if (imm == 1) {
       csinc(rd, rn, zr, cond);
     } else if (imm == -1) {
       csinv(rd, rn, zr, cond);
     } else {
-      Register temp = AppropriateTempFor(rn);
+      UseScratchRegisterScope temps(this);
+      Register temp = temps.AcquireSameSizeAs(rn);
       Mov(temp, operand.immediate());
       csel(rd, rn, temp, cond);
     }
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() == 0)) {
     // Unshifted register argument.
     csel(rd, rn, operand.reg(), cond);
   } else {
     // All other arguments.
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     csel(rd, rn, temp, cond);
   }
 }
 
 
 void MacroAssembler::AddSubMacro(const Register& rd,
                                  const Register& rn,
                                  const Operand& operand,
                                  FlagsUpdate S,
                                  AddSubOp op) {
   if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() &&
       !operand.NeedsRelocation() && (S == LeaveFlags)) {
     // The instruction would be a nop. Avoid generating useless code.
     return;
   }
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    AddSubMacro(rd, rn, Tmp0(), S, op);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    AddSubMacro(rd, rn, temp, S, op);
   } else if ((operand.IsImmediate() && !IsImmAddSub(operand.immediate())) ||
              (rn.IsZero() && !operand.IsShiftedRegister())                ||
              (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
-    Register temp = AppropriateTempFor(rn);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     AddSub(rd, rn, temp, S, op);
   } else {
     AddSub(rd, rn, operand, S, op);
   }
 }
 
 
 void MacroAssembler::AddSubWithCarryMacro(const Register& rd,
                                           const Register& rn,
                                           const Operand& operand,
                                           FlagsUpdate S,
                                           AddSubWithCarryOp op) {
   ASSERT(rd.SizeInBits() == rn.SizeInBits());
+  UseScratchRegisterScope temps(this);
 
   if (operand.NeedsRelocation()) {
-    LoadRelocated(Tmp0(), operand);
-    AddSubWithCarryMacro(rd, rn, Tmp0(), S, op);
+    Register temp = temps.AcquireX();
+    LoadRelocated(temp, operand);
+    AddSubWithCarryMacro(rd, rn, temp, S, op);
 
   } else if (operand.IsImmediate() ||
              (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
     // Add/sub with carry (immediate or ROR shifted register.)
-    Register temp = AppropriateTempFor(rn);
+    Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     AddSubWithCarry(rd, rn, temp, S, op);
+
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
     // Add/sub with carry (shifted register).
     ASSERT(operand.reg().SizeInBits() == rd.SizeInBits());
     ASSERT(operand.shift() != ROR);
     ASSERT(is_uintn(operand.shift_amount(),
-          rd.SizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+          rd.SizeInBits() == kXRegSizeInBits ? kXRegSizeInBitsLog2
+                                             : kWRegSizeInBitsLog2));
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitShift(temp, operand.reg(), operand.shift(), operand.shift_amount());
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else if (operand.IsExtendedRegister()) {
     // Add/sub with carry (extended register).
     ASSERT(operand.reg().SizeInBits() <= rd.SizeInBits());
     // Add/sub extended supports a shift <= 4. We want to support exactly the
     // same modes.
     ASSERT(operand.shift_amount() <= 4);
     ASSERT(operand.reg().Is64Bits() ||
            ((operand.extend() != UXTX) && (operand.extend() != SXTX)));
-    Register temp = AppropriateTempFor(rn, operand.reg());
+    Register temp = temps.AcquireSameSizeAs(rn);
     EmitExtendShift(temp, operand.reg(), operand.extend(),
                     operand.shift_amount());
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else {
     // The addressing mode is directly supported by the instruction.
     AddSubWithCarry(rd, rn, operand, S, op);
   }
 }
 
 
 void MacroAssembler::LoadStoreMacro(const CPURegister& rt,
                                     const MemOperand& addr,
                                     LoadStoreOp op) {
   int64_t offset = addr.offset();
   LSDataSize size = CalcLSDataSize(op);
 
   // Check if an immediate offset fits in the immediate field of the
   // appropriate instruction. If not, emit two instructions to perform
   // the operation.
   if (addr.IsImmediateOffset() && !IsImmLSScaled(offset, size) &&
       !IsImmLSUnscaled(offset)) {
     // Immediate offset that can't be encoded using unsigned or unscaled
     // addressing modes.
-    Register temp = AppropriateTempFor(addr.base());
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireSameSizeAs(addr.base());
     Mov(temp, addr.offset());
     LoadStore(rt, MemOperand(addr.base(), temp), op);
   } else if (addr.IsPostIndex() && !IsImmLSUnscaled(offset)) {
     // Post-index beyond unscaled addressing range.
     LoadStore(rt, MemOperand(addr.base()), op);
     add(addr.base(), addr.base(), offset);
   } else if (addr.IsPreIndex() && !IsImmLSUnscaled(offset)) {
     // Pre-index beyond unscaled addressing range.
     add(addr.base(), addr.base(), offset);
     LoadStore(rt, MemOperand(addr.base()), op);
@@ skipping 37 matching lines @@
     Strh(rt, addr);
   } else if (r.IsInteger32()) {
     Str(rt.W(), addr);
   } else {
     ASSERT(rt.Is64Bits());
     Str(rt, addr);
   }
 }
 
 
-bool MacroAssembler::ShouldEmitVeneer(int max_reachable_pc, int margin) {
-  // Account for the branch around the veneers and the guard.
-  int protection_offset = 2 * kInstructionSize;
-  return pc_offset() > max_reachable_pc - margin - protection_offset -
-    static_cast<int>(unresolved_branches_.size() * kMaxVeneerCodeSize);
-}
-
-
-void MacroAssembler::EmitVeneers(bool need_protection) {
-  RecordComment("[ Veneers");
-
-  Label end;
-  if (need_protection) {
-    B(&end);
-  }
-
-  EmitVeneersGuard();
-
-  {
-    InstructionAccurateScope scope(this);
-    Label size_check;
-
-    std::multimap<int, FarBranchInfo>::iterator it, it_to_delete;
-
-    it = unresolved_branches_.begin();
-    while (it != unresolved_branches_.end()) {
-      if (ShouldEmitVeneer(it->first)) {
-        Instruction* branch = InstructionAt(it->second.pc_offset_);
-        Label* label = it->second.label_;
-
-#ifdef DEBUG
-        __ bind(&size_check);
-#endif
-        // Patch the branch to point to the current position, and emit a branch
-        // to the label.
-        Instruction* veneer = reinterpret_cast<Instruction*>(pc_);
-        RemoveBranchFromLabelLinkChain(branch, label, veneer);
-        branch->SetImmPCOffsetTarget(veneer);
-        b(label);
-#ifdef DEBUG
-        ASSERT(SizeOfCodeGeneratedSince(&size_check) <=
-               static_cast<uint64_t>(kMaxVeneerCodeSize));
-        size_check.Unuse();
-#endif
-
-        it_to_delete = it++;
-        unresolved_branches_.erase(it_to_delete);
-      } else {
-        ++it;
-      }
-    }
-  }
-
-  Bind(&end);
-
-  RecordComment("]");
-}
-
-
-void MacroAssembler::EmitVeneersGuard() {
-  if (emit_debug_code()) {
-    Unreachable();
-  }
-}
-
-
-void MacroAssembler::CheckVeneers(bool need_protection) {
-  if (unresolved_branches_.empty()) {
-    return;
-  }
-
-  CHECK(pc_offset() < unresolved_branches_first_limit());
-  int margin = kVeneerDistanceMargin;
-  if (!need_protection) {
-    // Prefer emitting veneers protected by an existing instruction.
-    // The 4 divisor is a finger in the air guess. With a default margin of 2KB,
-    // that leaves 512B = 128 instructions of extra margin to avoid requiring a
-    // protective branch.
-    margin += margin / 4;
-  }
-  if (ShouldEmitVeneer(unresolved_branches_first_limit(), margin)) {
-    EmitVeneers(need_protection);
-  }
-}
-
-
 bool MacroAssembler::NeedExtraInstructionsOrRegisterBranch(
     Label *label, ImmBranchType b_type) {
   bool need_longer_range = false;
   // There are two situations in which we care about the offset being out of
   // range:
   //  - The label is bound but too far away.
   //  - The label is not bound but linked, and the previous branch
   //    instruction in the chain is too far away.
   if (label->is_bound() || label->is_linked()) {
     need_longer_range =
       !Instruction::IsValidImmPCOffset(b_type, label->pos() - pc_offset());
   }
   if (!need_longer_range && !label->is_bound()) {
     int max_reachable_pc = pc_offset() + Instruction::ImmBranchRange(b_type);
     unresolved_branches_.insert(
         std::pair<int, FarBranchInfo>(max_reachable_pc,
                                       FarBranchInfo(pc_offset(), label)));
+    // Also maintain the next pool check.
+    next_veneer_pool_check_ =
+      Min(next_veneer_pool_check_,
+          max_reachable_pc - kVeneerDistanceCheckMargin);
   }
   return need_longer_range;
 }
 
 
 void MacroAssembler::B(Label* label, BranchType type, Register reg, int bit) {
   ASSERT((reg.Is(NoReg) || type >= kBranchTypeFirstUsingReg) &&
          (bit == -1 || type >= kBranchTypeFirstUsingBit));
   if (kBranchTypeFirstCondition <= type && type <= kBranchTypeLastCondition) {
     B(static_cast<Condition>(type), label);
@@ skipping 15 matching lines @@
 void MacroAssembler::B(Label* label, Condition cond) {
   ASSERT(allow_macro_instructions_);
   ASSERT((cond != al) && (cond != nv));
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CondBranchType);
 
   if (need_extra_instructions) {
     b(&done, InvertCondition(cond));
-    b(label);
+    B(label);
   } else {
     b(label, cond);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, TestBranchType);
 
   if (need_extra_instructions) {
     tbz(rt, bit_pos, &done);
-    b(label);
+    B(label);
   } else {
     tbnz(rt, bit_pos, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Tbz(const Register& rt, unsigned bit_pos, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, TestBranchType);
 
   if (need_extra_instructions) {
     tbnz(rt, bit_pos, &done);
-    b(label);
+    B(label);
   } else {
     tbz(rt, bit_pos, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Cbnz(const Register& rt, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType);
 
   if (need_extra_instructions) {
     cbz(rt, &done);
-    b(label);
+    B(label);
   } else {
     cbnz(rt, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Cbz(const Register& rt, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType);
 
   if (need_extra_instructions) {
     cbnz(rt, &done);
-    b(label);
+    B(label);
   } else {
     cbz(rt, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 // Pseudo-instructions.
 
 
 void MacroAssembler::Abs(const Register& rd, const Register& rm,
                          Label* is_not_representable,
                          Label* is_representable) {
@@ skipping 150 matching lines @@
   }
 }
 
 
 void MacroAssembler::PushMultipleTimes(CPURegister src, int count) {
   int size = src.SizeInBytes();
 
   PrepareForPush(count, size);
 
   if (FLAG_optimize_for_size && count > 8) {
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
     Label loop;
-    __ Mov(Tmp0(), count / 2);
+    __ Mov(temp, count / 2);
     __ Bind(&loop);
     PushHelper(2, size, src, src, NoReg, NoReg);
-    __ Subs(Tmp0(), Tmp0(), 1);
+    __ Subs(temp, temp, 1);
     __ B(ne, &loop);
 
     count %= 2;
   }
 
   // Push up to four registers at a time if possible because if the current
   // stack pointer is csp and the register size is 32, registers must be pushed
   // in blocks of four in order to maintain the 16-byte alignment for csp.
   while (count >= 4) {
     PushHelper(4, size, src, src, src, src);
     count -= 4;
   }
   if (count >= 2) {
     PushHelper(2, size, src, src, NoReg, NoReg);
     count -= 2;
   }
   if (count == 1) {
     PushHelper(1, size, src, NoReg, NoReg, NoReg);
     count -= 1;
   }
   ASSERT(count == 0);
 }
 
 
 void MacroAssembler::PushMultipleTimes(CPURegister src, Register count) {
   PrepareForPush(Operand(count, UXTW, WhichPowerOf2(src.SizeInBytes())));
 
-  Register temp = AppropriateTempFor(count);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireSameSizeAs(count);
 
   if (FLAG_optimize_for_size) {
     Label loop, done;
 
     Subs(temp, count, 1);
     B(mi, &done);
 
     // Push all registers individually, to save code size.
     Bind(&loop);
     Subs(temp, temp, 1);
@@ skipping 190 matching lines @@
 
 
 void MacroAssembler::PushCalleeSavedRegisters() {
   // Ensure that the macro-assembler doesn't use any scratch registers.
   InstructionAccurateScope scope(this);
 
   // This method must not be called unless the current stack pointer is the
   // system stack pointer (csp).
   ASSERT(csp.Is(StackPointer()));
 
-  MemOperand tos(csp, -2 * kXRegSizeInBytes, PreIndex);
+  MemOperand tos(csp, -2 * kXRegSize, PreIndex);
 
   stp(d14, d15, tos);
   stp(d12, d13, tos);
   stp(d10, d11, tos);
   stp(d8, d9, tos);
 
   stp(x29, x30, tos);
   stp(x27, x28, tos);    // x28 = jssp
   stp(x25, x26, tos);
   stp(x23, x24, tos);
   stp(x21, x22, tos);
   stp(x19, x20, tos);
 }
 
 
 void MacroAssembler::PopCalleeSavedRegisters() {
   // Ensure that the macro-assembler doesn't use any scratch registers.
   InstructionAccurateScope scope(this);
 
   // This method must not be called unless the current stack pointer is the
   // system stack pointer (csp).
   ASSERT(csp.Is(StackPointer()));
 
-  MemOperand tos(csp, 2 * kXRegSizeInBytes, PostIndex);
+  MemOperand tos(csp, 2 * kXRegSize, PostIndex);
 
   ldp(x19, x20, tos);
   ldp(x21, x22, tos);
   ldp(x23, x24, tos);
   ldp(x25, x26, tos);
   ldp(x27, x28, tos);    // x28 = jssp
   ldp(x29, x30, tos);
 
   ldp(d8, d9, tos);
   ldp(d10, d11, tos);
@@ skipping 188 matching lines @@
   Add(scratch1, object, Code::kHeaderSize - kHeapObjectTag);
   Add(scratch1, scratch1, Operand::UntagSmi(scratch2));
   Br(scratch1);
 }
 
 
 void MacroAssembler::InNewSpace(Register object,
                                 Condition cond,
                                 Label* branch) {
   ASSERT(cond == eq || cond == ne);
-  // Use Tmp1() to have a different destination register, as Tmp0() will be used
-  // for relocation.
-  And(Tmp1(), object, Operand(ExternalReference::new_space_mask(isolate())));
-  Cmp(Tmp1(), Operand(ExternalReference::new_space_start(isolate())));
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  And(temp, object, Operand(ExternalReference::new_space_mask(isolate())));
+  Cmp(temp, Operand(ExternalReference::new_space_start(isolate())));
   B(cond, branch);
 }
 
 
 void MacroAssembler::Throw(Register value,
                            Register scratch1,
                            Register scratch2,
                            Register scratch3,
                            Register scratch4) {
   // Adjust this code if not the case.
@@ skipping 141 matching lines @@
   if (emit_debug_code()) {
     STATIC_ASSERT(kSmiTag == 0);
     Tst(object, kSmiTagMask);
     Check(ne, reason);
   }
 }
 
 
 void MacroAssembler::AssertName(Register object) {
   if (emit_debug_code()) {
-    STATIC_ASSERT(kSmiTag == 0);
-    // TODO(jbramley): Add AbortIfSmi and related functions.
-    Label not_smi;
-    JumpIfNotSmi(object, &not_smi);
-    Abort(kOperandIsASmiAndNotAName);
-    Bind(&not_smi);
+    AssertNotSmi(object, kOperandIsASmiAndNotAName);
 
-    Ldr(Tmp1(), FieldMemOperand(object, HeapObject::kMapOffset));
-    CompareInstanceType(Tmp1(), Tmp1(), LAST_NAME_TYPE);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
+    Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+    CompareInstanceType(temp, temp, LAST_NAME_TYPE);
     Check(ls, kOperandIsNotAName);
   }
 }
 
 
 void MacroAssembler::AssertString(Register object) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     STATIC_ASSERT(kSmiTag == 0);
     Tst(object, kSmiTagMask);
     Check(ne, kOperandIsASmiAndNotAString);
     Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
     CompareInstanceType(temp, temp, FIRST_NONSTRING_TYPE);
     Check(lo, kOperandIsNotAString);
   }
 }
 
 
@@ skipping 69 matching lines @@
   Mov(x3, Operand(thunk_ref));
   B(&end_profiler_check);
 
   Bind(&profiler_disabled);
   Mov(x3, function_address);
   Bind(&end_profiler_check);
 
   // Save the callee-save registers we are going to use.
   // TODO(all): Is this necessary? ARM doesn't do it.
   STATIC_ASSERT(kCallApiFunctionSpillSpace == 4);
-  Poke(x19, (spill_offset + 0) * kXRegSizeInBytes);
-  Poke(x20, (spill_offset + 1) * kXRegSizeInBytes);
-  Poke(x21, (spill_offset + 2) * kXRegSizeInBytes);
-  Poke(x22, (spill_offset + 3) * kXRegSizeInBytes);
+  Poke(x19, (spill_offset + 0) * kXRegSize);
+  Poke(x20, (spill_offset + 1) * kXRegSize);
+  Poke(x21, (spill_offset + 2) * kXRegSize);
+  Poke(x22, (spill_offset + 3) * kXRegSize);
 
   // Allocate HandleScope in callee-save registers.
   // We will need to restore the HandleScope after the call to the API function,
   // by allocating it in callee-save registers they will be preserved by C code.
   Register handle_scope_base = x22;
   Register next_address_reg = x19;
   Register limit_reg = x20;
   Register level_reg = w21;
 
   Mov(handle_scope_base, Operand(next_address));
@@ skipping 43 matching lines @@
     Check(eq, kUnexpectedLevelAfterReturnFromApiCall);
   }
   Sub(level_reg, level_reg, 1);
   Str(level_reg, MemOperand(handle_scope_base, kLevelOffset));
   Ldr(x1, MemOperand(handle_scope_base, kLimitOffset));
   Cmp(limit_reg, x1);
   B(ne, &delete_allocated_handles);
 
   Bind(&leave_exit_frame);
   // Restore callee-saved registers.
-  Peek(x19, (spill_offset + 0) * kXRegSizeInBytes);
-  Peek(x20, (spill_offset + 1) * kXRegSizeInBytes);
-  Peek(x21, (spill_offset + 2) * kXRegSizeInBytes);
-  Peek(x22, (spill_offset + 3) * kXRegSizeInBytes);
+  Peek(x19, (spill_offset + 0) * kXRegSize);
+  Peek(x20, (spill_offset + 1) * kXRegSize);
+  Peek(x21, (spill_offset + 2) * kXRegSize);
+  Peek(x22, (spill_offset + 3) * kXRegSize);
 
   // Check if the function scheduled an exception.
   Mov(x5, Operand(ExternalReference::scheduled_exception_address(isolate())));
   Ldr(x5, MemOperand(x5));
   JumpIfNotRoot(x5, Heap::kTheHoleValueRootIndex, &promote_scheduled_exception);
   Bind(&exception_handled);
 
   bool restore_context = context_restore_operand != NULL;
   if (restore_context) {
     Ldr(cp, *context_restore_operand);
@@ skipping 46 matching lines @@
                                         Builtins::JavaScript id) {
   // Load the builtins object into target register.
   Ldr(target, GlobalObjectMemOperand());
   Ldr(target, FieldMemOperand(target, GlobalObject::kBuiltinsOffset));
   // Load the JavaScript builtin function from the builtins object.
   Ldr(target, FieldMemOperand(target,
                           JSBuiltinsObject::OffsetOfFunctionWithId(id)));
 }
 
 
-void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {
-  ASSERT(!target.is(x1));
-  GetBuiltinFunction(x1, id);
+void MacroAssembler::GetBuiltinEntry(Register target,
+                                     Register function,
+                                     Builtins::JavaScript id) {
+  ASSERT(!AreAliased(target, function));
+  GetBuiltinFunction(function, id);
   // Load the code entry point from the builtins object.
-  Ldr(target, FieldMemOperand(x1, JSFunction::kCodeEntryOffset));
+  Ldr(target, FieldMemOperand(function, JSFunction::kCodeEntryOffset));
 }
 
 
 void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,
                                    InvokeFlag flag,
                                    const CallWrapper& call_wrapper) {
   ASM_LOCATION("MacroAssembler::InvokeBuiltin");
   // You can't call a builtin without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
-  GetBuiltinEntry(x2, id);
+  // Get the builtin entry in x2 and setup the function object in x1.
+  GetBuiltinEntry(x2, x1, id);
   if (flag == CALL_FUNCTION) {
     call_wrapper.BeforeCall(CallSize(x2));
     Call(x2);
     call_wrapper.AfterCall();
   } else {
     ASSERT(flag == JUMP_FUNCTION);
     Jump(x2);
   }
 }
 
@@ skipping 54 matching lines @@
 
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_of_reg_args) {
   CallCFunction(function, num_of_reg_args, 0);
 }
 
 
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_of_reg_args,
                                    int num_of_double_args) {
-  Mov(Tmp0(), Operand(function));
-  CallCFunction(Tmp0(), num_of_reg_args, num_of_double_args);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Mov(temp, Operand(function));
+  CallCFunction(temp, num_of_reg_args, num_of_double_args);
 }
 
 
 void MacroAssembler::CallCFunction(Register function,
                                    int num_of_reg_args,
                                    int num_of_double_args) {
   ASSERT(has_frame());
   // We can pass 8 integer arguments in registers. If we need to pass more than
   // that, we'll need to implement support for passing them on the stack.
   ASSERT(num_of_reg_args <= 8);
@@ skipping 32 matching lines @@
 
   // Call directly. The function called cannot cause a GC, or allow preemption,
   // so the return address in the link register stays correct.
   Call(function);
 
   if (!csp.Is(old_stack_pointer)) {
     if (emit_debug_code()) {
       // Because the stack pointer must be aligned on a 16-byte boundary, the
       // aligned csp can be up to 12 bytes below the jssp. This is the case
       // where we only pushed one W register on top of an aligned jssp.
-      Register temp = Tmp1();
+      UseScratchRegisterScope temps(this);
+      Register temp = temps.AcquireX();
       ASSERT(ActivationFrameAlignment() == 16);
       Sub(temp, csp, old_stack_pointer);
       // We want temp <= 0 && temp >= -12.
       Cmp(temp, 0);
       Ccmp(temp, -12, NFlag, le);
       Check(ge, kTheStackWasCorruptedByMacroAssemblerCall);
     }
     SetStackPointer(old_stack_pointer);
   }
 }
 
 
 void MacroAssembler::Jump(Register target) {
   Br(target);
 }
 
 
 void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode) {
-  Mov(Tmp0(), Operand(target, rmode));
-  Br(Tmp0());
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Mov(temp, Operand(target, rmode));
+  Br(temp);
 }
 
 
 void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode) {
   ASSERT(!RelocInfo::IsCodeTarget(rmode));
   Jump(reinterpret_cast<intptr_t>(target), rmode);
 }
 
 
 void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode) {
   ASSERT(RelocInfo::IsCodeTarget(rmode));
   AllowDeferredHandleDereference embedding_raw_address;
   Jump(reinterpret_cast<intptr_t>(code.location()), rmode);
 }
 
 
 void MacroAssembler::Call(Register target) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
 
   Blr(target);
 
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target));
 #endif
 }
 
 
 void MacroAssembler::Call(Label* target) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
 
   Bl(target);
 
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target));
 #endif
 }
 
 
 // MacroAssembler::CallSize is sensitive to changes in this function, as it
 // requires to know how many instructions are used to branch to the target.
 void MacroAssembler::Call(Address target, RelocInfo::Mode rmode) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
   // Statement positions are expected to be recorded when the target
   // address is loaded.
   positions_recorder()->WriteRecordedPositions();
 
   // Addresses always have 64 bits, so we shouldn't encounter NONE32.
   ASSERT(rmode != RelocInfo::NONE32);
 
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+
   if (rmode == RelocInfo::NONE64) {
     uint64_t imm = reinterpret_cast<uint64_t>(target);
-    movz(Tmp0(), (imm >> 0) & 0xffff, 0);
-    movk(Tmp0(), (imm >> 16) & 0xffff, 16);
-    movk(Tmp0(), (imm >> 32) & 0xffff, 32);
-    movk(Tmp0(), (imm >> 48) & 0xffff, 48);
+    movz(temp, (imm >> 0) & 0xffff, 0);
+    movk(temp, (imm >> 16) & 0xffff, 16);
+    movk(temp, (imm >> 32) & 0xffff, 32);
+    movk(temp, (imm >> 48) & 0xffff, 48);
   } else {
-    LoadRelocated(Tmp0(), Operand(reinterpret_cast<intptr_t>(target), rmode));
+    LoadRelocated(temp, Operand(reinterpret_cast<intptr_t>(target), rmode));
   }
-  Blr(Tmp0());
+  Blr(temp);
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target, rmode));
 #endif
 }
 
 
 void MacroAssembler::Call(Handle<Code> code,
                           RelocInfo::Mode rmode,
                           TypeFeedbackId ast_id) {
 #ifdef DEBUG
@@ skipping 60 matching lines @@
 
 
 
 
 
 void MacroAssembler::JumpForHeapNumber(Register object,
                                        Register heap_number_map,
                                        Label* on_heap_number,
                                        Label* on_not_heap_number) {
   ASSERT(on_heap_number || on_not_heap_number);
-  // Tmp0() is used as a scratch register.
-  ASSERT(!AreAliased(Tmp0(), heap_number_map));
   AssertNotSmi(object);
 
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+
   // Load the HeapNumber map if it is not passed.
   if (heap_number_map.Is(NoReg)) {
-    heap_number_map = Tmp1();
+    heap_number_map = temps.AcquireX();
     LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   } else {
-    // This assert clobbers Tmp0(), so do it before loading Tmp0() with the map.
     AssertRegisterIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
   }
 
-  Ldr(Tmp0(), FieldMemOperand(object, HeapObject::kMapOffset));
-  Cmp(Tmp0(), heap_number_map);
+  ASSERT(!AreAliased(temp, heap_number_map));
+
+  Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+  Cmp(temp, heap_number_map);
 
   if (on_heap_number) {
     B(eq, on_heap_number);
   }
   if (on_not_heap_number) {
     B(ne, on_not_heap_number);
   }
 }
 
 
@@ skipping 43 matching lines @@
   // number string cache for smis is just the smi value, and the hash for
   // doubles is the xor of the upper and lower words. See
   // Heap::GetNumberStringCache.
   Label is_smi;
   Label load_result_from_cache;
 
   JumpIfSmi(object, &is_smi);
   CheckMap(object, scratch1, Heap::kHeapNumberMapRootIndex, not_found,
            DONT_DO_SMI_CHECK);
 
-  STATIC_ASSERT(kDoubleSize == (kWRegSizeInBytes * 2));
+  STATIC_ASSERT(kDoubleSize == (kWRegSize * 2));
   Add(scratch1, object, HeapNumber::kValueOffset - kHeapObjectTag);
   Ldp(scratch1.W(), scratch2.W(), MemOperand(scratch1));
   Eor(scratch1, scratch1, scratch2);
   And(scratch1, scratch1, mask);
 
   // Calculate address of entry in string cache: each entry consists of two
   // pointer sized fields.
   Add(scratch1, number_string_cache,
       Operand(scratch1, LSL, kPointerSizeLog2 + 1));
 
@@ skipping 41 matching lines @@
     B(on_successful_conversion, eq);
   }
   if (on_failed_conversion) {
     B(on_failed_conversion, ne);
   }
 }
 
 
 void MacroAssembler::JumpIfMinusZero(DoubleRegister input,
                                      Label* on_negative_zero) {
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
   // Floating point -0.0 is kMinInt as an integer, so subtracting 1 (cmp) will
   // cause overflow.
-  Fmov(Tmp0(), input);
-  Cmp(Tmp0(), 1);
+  Fmov(temp, input);
+  Cmp(temp, 1);
   B(vs, on_negative_zero);
 }
 
 
 void MacroAssembler::ClampInt32ToUint8(Register output, Register input) {
   // Clamp the value to [0..255].
   Cmp(input.W(), Operand(input.W(), UXTB));
   // If input < input & 0xff, it must be < 0, so saturate to 0.
   Csel(output.W(), wzr, input.W(), lt);
-  // Create a constant 0xff.
-  Mov(WTmp0(), 255);
-  // If input > input & 0xff, it must be > 255, so saturate to 255.
-  Csel(output.W(), WTmp0(), output.W(), gt);
+  // If input <= input & 0xff, it must be <= 255. Otherwise, saturate to 255.
+  Csel(output.W(), output.W(), 255, le);
 }
 
 
 void MacroAssembler::ClampInt32ToUint8(Register in_out) {
   ClampInt32ToUint8(in_out, in_out);
 }
 
 
 void MacroAssembler::ClampDoubleToUint8(Register output,
                                         DoubleRegister input,
@@ skipping 13 matching lines @@
   // Values greater than 255 have already been clamped to 255.
   Fcvtnu(output, dbl_scratch);
 }
 
 
 void MacroAssembler::CopyFieldsLoopPairsHelper(Register dst,
                                                Register src,
                                                unsigned count,
                                                Register scratch1,
                                                Register scratch2,
-                                               Register scratch3) {
+                                               Register scratch3,
+                                               Register scratch4,
+                                               Register scratch5) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in a tight loop.
-  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3, Tmp0(), Tmp1()));
+  ASSERT(!AreAliased(dst, src,
+                     scratch1, scratch2, scratch3, scratch4, scratch5));
   ASSERT(count >= 2);
 
   const Register& remaining = scratch3;
   Mov(remaining, count / 2);
 
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
-
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
-  sub(dst_untagged, dst, kHeapObjectTag);
-  sub(src_untagged, src, kHeapObjectTag);
+  Sub(dst_untagged, dst, kHeapObjectTag);
+  Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   Label loop;
-  bind(&loop);
-  ldp(Tmp0(), Tmp1(), MemOperand(src_untagged, kXRegSizeInBytes * 2,
-                                 PostIndex));
-  stp(Tmp0(), Tmp1(), MemOperand(dst_untagged, kXRegSizeInBytes * 2,
-                                 PostIndex));
-  sub(remaining, remaining, 1);
-  cbnz(remaining, &loop);
+  Bind(&loop);
+  Ldp(scratch4, scratch5,
+      MemOperand(src_untagged, kXRegSize* 2, PostIndex));
+  Stp(scratch4, scratch5,
+      MemOperand(dst_untagged, kXRegSize* 2, PostIndex));
+  Sub(remaining, remaining, 1);
+  Cbnz(remaining, &loop);
 
   // Handle the leftovers.
   if (count & 1) {
-    ldr(Tmp0(), MemOperand(src_untagged));
-    str(Tmp0(), MemOperand(dst_untagged));
+    Ldr(scratch4, MemOperand(src_untagged));
+    Str(scratch4, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledPairsHelper(Register dst,
                                                    Register src,
                                                    unsigned count,
                                                    Register scratch1,
-                                                   Register scratch2) {
+                                                   Register scratch2,
+                                                   Register scratch3,
+                                                   Register scratch4) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
-  ASSERT(!AreAliased(dst, src, scratch1, scratch2, Tmp0(), Tmp1()));
-
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
+  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3, scratch4));
 
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
   sub(dst_untagged, dst, kHeapObjectTag);
   sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   for (unsigned i = 0; i < count / 2; i++) {
-    ldp(Tmp0(), Tmp1(), MemOperand(src_untagged, kXRegSizeInBytes * 2,
-                                   PostIndex));
-    stp(Tmp0(), Tmp1(), MemOperand(dst_untagged, kXRegSizeInBytes * 2,
-                                   PostIndex));
+    Ldp(scratch3, scratch4, MemOperand(src_untagged, kXRegSize * 2, PostIndex));
+    Stp(scratch3, scratch4, MemOperand(dst_untagged, kXRegSize * 2, PostIndex));
   }
 
   // Handle the leftovers.
   if (count & 1) {
-    ldr(Tmp0(), MemOperand(src_untagged));
-    str(Tmp0(), MemOperand(dst_untagged));
+    Ldr(scratch3, MemOperand(src_untagged));
+    Str(scratch3, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledHelper(Register dst,
                                               Register src,
                                               unsigned count,
-                                              Register scratch1) {
+                                              Register scratch1,
+                                              Register scratch2,
+                                              Register scratch3) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
-  ASSERT(!AreAliased(dst, src, scratch1, Tmp0(), Tmp1()));
-
-  // Only use the Assembler, so we can use Tmp0() and Tmp1().
-  InstructionAccurateScope scope(this);
+  ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3));
 
   const Register& dst_untagged = scratch1;
-  const Register& src_untagged = Tmp1();
-  sub(dst_untagged, dst, kHeapObjectTag);
-  sub(src_untagged, src, kHeapObjectTag);
+  const Register& src_untagged = scratch2;
+  Sub(dst_untagged, dst, kHeapObjectTag);
+  Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields one by one.
   for (unsigned i = 0; i < count; i++) {
-    ldr(Tmp0(), MemOperand(src_untagged, kXRegSizeInBytes, PostIndex));
-    str(Tmp0(), MemOperand(dst_untagged, kXRegSizeInBytes, PostIndex));
+    Ldr(scratch3, MemOperand(src_untagged, kXRegSize, PostIndex));
+    Str(scratch3, MemOperand(dst_untagged, kXRegSize, PostIndex));
   }
 }
 
 
 void MacroAssembler::CopyFields(Register dst, Register src, CPURegList temps,
                                 unsigned count) {
   // One of two methods is used:
   //
   // For high 'count' values where many scratch registers are available:
   //    Untag src and dst into scratch registers.
   //    Copy src->dst in a tight loop.
   //
   // For low 'count' values or where few scratch registers are available:
   //    Untag src and dst into scratch registers.
   //    Copy src->dst in an unrolled loop.
   //
   // In both cases, fields are copied in pairs if possible, and left-overs are
   // handled separately.
+  ASSERT(!AreAliased(dst, src));
   ASSERT(!temps.IncludesAliasOf(dst));
   ASSERT(!temps.IncludesAliasOf(src));
-  ASSERT(!temps.IncludesAliasOf(Tmp0()));
-  ASSERT(!temps.IncludesAliasOf(Tmp1()));
   ASSERT(!temps.IncludesAliasOf(xzr));
-  ASSERT(!AreAliased(dst, src, Tmp0(), Tmp1()));
 
   if (emit_debug_code()) {
     Cmp(dst, src);
     Check(ne, kTheSourceAndDestinationAreTheSame);
   }
 
   // The value of 'count' at which a loop will be generated (if there are
   // enough scratch registers).
   static const unsigned kLoopThreshold = 8;
 
-  ASSERT(!temps.IsEmpty());
-  Register scratch1 = Register(temps.PopLowestIndex());
-  Register scratch2 = Register(temps.PopLowestIndex());
-  Register scratch3 = Register(temps.PopLowestIndex());
-
-  if (scratch3.IsValid() && (count >= kLoopThreshold)) {
-    CopyFieldsLoopPairsHelper(dst, src, count, scratch1, scratch2, scratch3);
-  } else if (scratch2.IsValid()) {
-    CopyFieldsUnrolledPairsHelper(dst, src, count, scratch1, scratch2);
-  } else if (scratch1.IsValid()) {
-    CopyFieldsUnrolledHelper(dst, src, count, scratch1);
+  UseScratchRegisterScope masm_temps(this);
+  if ((temps.Count() >= 3) && (count >= kLoopThreshold)) {
+    CopyFieldsLoopPairsHelper(dst, src, count,
+                              Register(temps.PopLowestIndex()),
+                              Register(temps.PopLowestIndex()),
+                              Register(temps.PopLowestIndex()),
+                              masm_temps.AcquireX(),
+                              masm_temps.AcquireX());
+  } else if (temps.Count() >= 2) {
+    CopyFieldsUnrolledPairsHelper(dst, src, count,
+                                  Register(temps.PopLowestIndex()),
+                                  Register(temps.PopLowestIndex()),
+                                  masm_temps.AcquireX(),
+                                  masm_temps.AcquireX());
+  } else if (temps.Count() == 1) {
+    CopyFieldsUnrolledHelper(dst, src, count,
+                             Register(temps.PopLowestIndex()),
+                             masm_temps.AcquireX(),
+                             masm_temps.AcquireX());
   } else {
     UNREACHABLE();
   }
 }
 
 
 void MacroAssembler::CopyBytes(Register dst,
                                Register src,
                                Register length,
                                Register scratch,
@@ skipping 20 matching lines @@
 
   Bind(&loop);
   Sub(length, length, 1);
   Ldrb(scratch, MemOperand(src, 1, PostIndex));
   Strb(scratch, MemOperand(dst, 1, PostIndex));
   Cbnz(length, &loop);
   Bind(&done);
 }
 
 
-void MacroAssembler::InitializeFieldsWithFiller(Register start_offset,
-                                                Register end_offset,
-                                                Register filler) {
-  Label loop, entry;
+void MacroAssembler::FillFields(Register dst,
+                                Register field_count,
+                                Register filler) {
+  ASSERT(!dst.Is(csp));
+  UseScratchRegisterScope temps(this);
+  Register field_ptr = temps.AcquireX();
+  Register counter = temps.AcquireX();
+  Label done;
+
+  // Decrement count. If the result < zero, count was zero, and there's nothing
+  // to do. If count was one, flags are set to fail the gt condition at the end
+  // of the pairs loop.
+  Subs(counter, field_count, 1);
+  B(lt, &done);
+
+  // There's at least one field to fill, so do this unconditionally.
+  Str(filler, MemOperand(dst, kPointerSize, PostIndex));
+
+  // If the bottom bit of counter is set, there are an even number of fields to
+  // fill, so pull the start pointer back by one field, allowing the pairs loop
+  // to overwrite the field that was stored above.
+  And(field_ptr, counter, 1);
+  Sub(field_ptr, dst, Operand(field_ptr, LSL, kPointerSizeLog2));
+
+  // Store filler to memory in pairs.
+  Label entry, loop;
   B(&entry);
   Bind(&loop);
-  // TODO(all): consider using stp here.
-  Str(filler, MemOperand(start_offset, kPointerSize, PostIndex));
+  Stp(filler, filler, MemOperand(field_ptr, 2 * kPointerSize, PostIndex));
+  Subs(counter, counter, 2);
   Bind(&entry);
-  Cmp(start_offset, end_offset);
-  B(lt, &loop);
+  B(gt, &loop);
+
+  Bind(&done);
 }
 
 
 void MacroAssembler::JumpIfEitherIsNotSequentialAsciiStrings(
     Register first,
     Register second,
     Register scratch1,
     Register scratch2,
     Label* failure,
     SmiCheckType smi_check) {
@@ skipping 318 matching lines @@
                      result,
                      0,
                      true,   // is_truncating
                      true);  // skip_fastpath
   CallStub(&stub);  // DoubleToIStub preserves any registers it needs to clobber
 
   Drop(1, kDoubleSize);  // Drop the double input on the stack.
   Pop(lr);
 
   Bind(&done);
-
-  // TODO(rmcilroy): Remove this Sxtw once the following bug is fixed:
-  // https://code.google.com/p/v8/issues/detail?id=3149
-  Sxtw(result, result.W());
 }
 
 
 void MacroAssembler::TruncateHeapNumberToI(Register result,
                                            Register object) {
   Label done;
   ASSERT(!result.is(object));
   ASSERT(jssp.Is(StackPointer()));
 
   Ldr(fp_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
 
   // Try to convert the double to an int64. If successful, the bottom 32 bits
   // contain our truncated int32 result.
   TryConvertDoubleToInt64(result, fp_scratch, &done);
 
   // If we fell through then inline version didn't succeed - call stub instead.
   Push(lr);
   DoubleToIStub stub(object,
                      result,
                      HeapNumber::kValueOffset - kHeapObjectTag,
                      true,   // is_truncating
                      true);  // skip_fastpath
   CallStub(&stub);  // DoubleToIStub preserves any registers it needs to clobber
   Pop(lr);
 
   Bind(&done);
-
-  // TODO(rmcilroy): Remove this Sxtw once the following bug is fixed:
-  // https://code.google.com/p/v8/issues/detail?id=3149
-  Sxtw(result, result.W());
 }
 
 
 void MacroAssembler::Prologue(PrologueFrameMode frame_mode) {
   if (frame_mode == BUILD_STUB_FRAME) {
     ASSERT(StackPointer().Is(jssp));
-    // TODO(jbramley): Does x1 contain a JSFunction here, or does it already
-    // have the special STUB smi?
-    __ Mov(Tmp0(), Operand(Smi::FromInt(StackFrame::STUB)));
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+    __ Mov(temp, Operand(Smi::FromInt(StackFrame::STUB)));
     // Compiled stubs don't age, and so they don't need the predictable code
     // ageing sequence.
-    __ Push(lr, fp, cp, Tmp0());
+    __ Push(lr, fp, cp, temp);
     __ Add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp);
   } else {
     if (isolate()->IsCodePreAgingActive()) {
       Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
       __ EmitCodeAgeSequence(stub);
     } else {
       __ EmitFrameSetupForCodeAgePatching();
     }
   }
 }
 
 
 void MacroAssembler::EnterFrame(StackFrame::Type type) {
   ASSERT(jssp.Is(StackPointer()));
+  UseScratchRegisterScope temps(this);
+  Register type_reg = temps.AcquireX();
+  Register code_reg = temps.AcquireX();
+
   Push(lr, fp, cp);
-  Mov(Tmp1(), Operand(Smi::FromInt(type)));
-  Mov(Tmp0(), Operand(CodeObject()));
-  Push(Tmp1(), Tmp0());
+  Mov(type_reg, Operand(Smi::FromInt(type)));
+  Mov(code_reg, Operand(CodeObject()));
+  Push(type_reg, code_reg);
   // jssp[4] : lr
   // jssp[3] : fp
   // jssp[2] : cp
   // jssp[1] : type
   // jssp[0] : code object
 
   // Adjust FP to point to saved FP.
-  add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize);
+  Add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize);
 }
 
 
 void MacroAssembler::LeaveFrame(StackFrame::Type type) {
   ASSERT(jssp.Is(StackPointer()));
   // Drop the execution stack down to the frame pointer and restore
   // the caller frame pointer and return address.
   Mov(jssp, fp);
   AssertStackConsistency();
   Pop(fp, lr);
 }
 
 
 void MacroAssembler::ExitFramePreserveFPRegs() {
   PushCPURegList(kCallerSavedFP);
 }
 
 
 void MacroAssembler::ExitFrameRestoreFPRegs() {
   // Read the registers from the stack without popping them. The stack pointer
   // will be reset as part of the unwinding process.
   CPURegList saved_fp_regs = kCallerSavedFP;
   ASSERT(saved_fp_regs.Count() % 2 == 0);
 
   int offset = ExitFrameConstants::kLastExitFrameField;
   while (!saved_fp_regs.IsEmpty()) {
     const CPURegister& dst0 = saved_fp_regs.PopHighestIndex();
     const CPURegister& dst1 = saved_fp_regs.PopHighestIndex();
-    offset -= 2 * kDRegSizeInBytes;
+    offset -= 2 * kDRegSize;
     Ldp(dst1, dst0, MemOperand(fp, offset));
   }
 }
 
 
 // TODO(jbramley): Check that we're handling the frame pointer correctly.
 void MacroAssembler::EnterExitFrame(bool save_doubles,
                                     const Register& scratch,
                                     int extra_space) {
   ASSERT(jssp.Is(StackPointer()));
@@ skipping 24 matching lines @@
 
   STATIC_ASSERT((-2 * kPointerSize) ==
                 ExitFrameConstants::kLastExitFrameField);
   if (save_doubles) {
     ExitFramePreserveFPRegs();
   }
 
   // Reserve space for the return address and for user requested memory.
   // We do this before aligning to make sure that we end up correctly
   // aligned with the minimum of wasted space.
-  Claim(extra_space + 1, kXRegSizeInBytes);
+  Claim(extra_space + 1, kXRegSize);
   //         fp[8]: CallerPC (lr)
   //   fp -> fp[0]: CallerFP (old fp)
   //         fp[-8]: Space reserved for SPOffset.
   //         fp[-16]: CodeObject()
   //         jssp[-16 - fp_size]: Saved doubles (if save_doubles is true).
   //         jssp[8]: Extra space reserved for caller (if extra_space != 0).
   // jssp -> jssp[0]: Space reserved for the return address.
 
   // Align and synchronize the system stack pointer with jssp.
   AlignAndSetCSPForFrame();
   ASSERT(csp.Is(StackPointer()));
 
   //         fp[8]: CallerPC (lr)
   //   fp -> fp[0]: CallerFP (old fp)
   //         fp[-8]: Space reserved for SPOffset.
   //         fp[-16]: CodeObject()
   //         csp[...]: Saved doubles, if saved_doubles is true.
   //         csp[8]: Memory reserved for the caller if extra_space != 0.
   //                 Alignment padding, if necessary.
   //  csp -> csp[0]: Space reserved for the return address.
 
   // ExitFrame::GetStateForFramePointer expects to find the return address at
   // the memory address immediately below the pointer stored in SPOffset.
   // It is not safe to derive much else from SPOffset, because the size of the
   // padding can vary.
-  Add(scratch, csp, kXRegSizeInBytes);
+  Add(scratch, csp, kXRegSize);
   Str(scratch, MemOperand(fp, ExitFrameConstants::kSPOffset));
 }
 
 
 // Leave the current exit frame.
 void MacroAssembler::LeaveExitFrame(bool restore_doubles,
                                     const Register& scratch,
                                     bool restore_context) {
   ASSERT(csp.Is(StackPointer()));
 
@@ skipping 121 matching lines @@
   Push(x10);
   // Set this new handler as the current one.
   Str(jssp, MemOperand(x11));
 }
 
 
 void MacroAssembler::PopTryHandler() {
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   Pop(x10);
   Mov(x11, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  Drop(StackHandlerConstants::kSize - kXRegSizeInBytes, kByteSizeInBytes);
+  Drop(StackHandlerConstants::kSize - kXRegSize, kByteSizeInBytes);
   Str(x10, MemOperand(x11));
 }
 
 
 void MacroAssembler::Allocate(int object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
   ASSERT(object_size <= Page::kMaxRegularHeapObjectSize);
   if (!FLAG_inline_new) {
     if (emit_debug_code()) {
       // Trash the registers to simulate an allocation failure.
       // We apply salt to the original zap value to easily spot the values.
       Mov(result, (kDebugZapValue & ~0xffL) | 0x11L);
       Mov(scratch1, (kDebugZapValue & ~0xffL) | 0x21L);
       Mov(scratch2, (kDebugZapValue & ~0xffL) | 0x21L);
     }
     B(gc_required);
     return;
   }
 
-  ASSERT(!AreAliased(result, scratch1, scratch2, Tmp0(), Tmp1()));
-  ASSERT(result.Is64Bits() && scratch1.Is64Bits() && scratch2.Is64Bits() &&
-         Tmp0().Is64Bits() && Tmp1().Is64Bits());
+  UseScratchRegisterScope temps(this);
+  Register scratch3 = temps.AcquireX();
+
+  ASSERT(!AreAliased(result, scratch1, scratch2, scratch3));
+  ASSERT(result.Is64Bits() && scratch1.Is64Bits() && scratch2.Is64Bits());
 
   // Make object size into bytes.
   if ((flags & SIZE_IN_WORDS) != 0) {
     object_size *= kPointerSize;
   }
   ASSERT(0 == (object_size & kObjectAlignmentMask));
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDP.
   ExternalReference heap_allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
   ExternalReference heap_allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
   intptr_t top = reinterpret_cast<intptr_t>(heap_allocation_top.address());
   intptr_t limit = reinterpret_cast<intptr_t>(heap_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch1;
   Register allocation_limit = scratch2;
   Mov(top_address, Operand(heap_allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and the allocation limit.
     Ldp(result, allocation_limit, MemOperand(top_address));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      Ldr(Tmp0(), MemOperand(top_address));
-      Cmp(result, Tmp0());
+      Ldr(scratch3, MemOperand(top_address));
+      Cmp(result, scratch3);
       Check(eq, kUnexpectedAllocationTop);
     }
     // Load the allocation limit. 'result' already contains the allocation top.
     Ldr(allocation_limit, MemOperand(top_address, limit - top));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on A64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   // Calculate new top and bail out if new space is exhausted.
-  Adds(Tmp1(), result, object_size);
+  Adds(scratch3, result, object_size);
   B(vs, gc_required);
-  Cmp(Tmp1(), allocation_limit);
+  Cmp(scratch3, allocation_limit);
   B(hi, gc_required);
-  Str(Tmp1(), MemOperand(top_address));
+  Str(scratch3, MemOperand(top_address));
 
   // Tag the object if requested.
   if ((flags & TAG_OBJECT) != 0) {
     Orr(result, result, kHeapObjectTag);
   }
 }
 
 
 void MacroAssembler::Allocate(Register object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
   if (!FLAG_inline_new) {
     if (emit_debug_code()) {
       // Trash the registers to simulate an allocation failure.
       // We apply salt to the original zap value to easily spot the values.
       Mov(result, (kDebugZapValue & ~0xffL) | 0x11L);
       Mov(scratch1, (kDebugZapValue & ~0xffL) | 0x21L);
       Mov(scratch2, (kDebugZapValue & ~0xffL) | 0x21L);
     }
     B(gc_required);
     return;
   }
 
-  ASSERT(!AreAliased(object_size, result, scratch1, scratch2, Tmp0(), Tmp1()));
-  ASSERT(object_size.Is64Bits() && result.Is64Bits() && scratch1.Is64Bits() &&
-         scratch2.Is64Bits() && Tmp0().Is64Bits() && Tmp1().Is64Bits());
+  UseScratchRegisterScope temps(this);
+  Register scratch3 = temps.AcquireX();
+
+  ASSERT(!AreAliased(object_size, result, scratch1, scratch2, scratch3));
+  ASSERT(object_size.Is64Bits() && result.Is64Bits() &&
+         scratch1.Is64Bits() && scratch2.Is64Bits());
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDP.
   ExternalReference heap_allocation_top =
       AllocationUtils::GetAllocationTopReference(isolate(), flags);
   ExternalReference heap_allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
   intptr_t top = reinterpret_cast<intptr_t>(heap_allocation_top.address());
   intptr_t limit = reinterpret_cast<intptr_t>(heap_allocation_limit.address());
   ASSERT((limit - top) == kPointerSize);
 
   // Set up allocation top address and object size registers.
   Register top_address = scratch1;
   Register allocation_limit = scratch2;
   Mov(top_address, Operand(heap_allocation_top));
 
   if ((flags & RESULT_CONTAINS_TOP) == 0) {
     // Load allocation top into result and the allocation limit.
     Ldp(result, allocation_limit, MemOperand(top_address));
   } else {
     if (emit_debug_code()) {
       // Assert that result actually contains top on entry.
-      Ldr(Tmp0(), MemOperand(top_address));
-      Cmp(result, Tmp0());
+      Ldr(scratch3, MemOperand(top_address));
+      Cmp(result, scratch3);
       Check(eq, kUnexpectedAllocationTop);
     }
     // Load the allocation limit. 'result' already contains the allocation top.
     Ldr(allocation_limit, MemOperand(top_address, limit - top));
   }
 
   // We can ignore DOUBLE_ALIGNMENT flags here because doubles and pointers have
   // the same alignment on A64.
   STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
 
   // Calculate new top and bail out if new space is exhausted
   if ((flags & SIZE_IN_WORDS) != 0) {
-    Adds(Tmp1(), result, Operand(object_size, LSL, kPointerSizeLog2));
+    Adds(scratch3, result, Operand(object_size, LSL, kPointerSizeLog2));
   } else {
-    Adds(Tmp1(), result, object_size);
+    Adds(scratch3, result, object_size);
   }
 
   if (emit_debug_code()) {
-    Tst(Tmp1(), kObjectAlignmentMask);
+    Tst(scratch3, kObjectAlignmentMask);
     Check(eq, kUnalignedAllocationInNewSpace);
   }
 
   B(vs, gc_required);
-  Cmp(Tmp1(), allocation_limit);
+  Cmp(scratch3, allocation_limit);
   B(hi, gc_required);
-  Str(Tmp1(), MemOperand(top_address));
+  Str(scratch3, MemOperand(top_address));
 
   // Tag the object if requested.
   if ((flags & TAG_OBJECT) != 0) {
     Orr(result, result, kHeapObjectTag);
   }
 }
 
 
 void MacroAssembler::UndoAllocationInNewSpace(Register object,
                                               Register scratch) {
@@ skipping 307 matching lines @@
   }
   Ldr(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
   Cmp(scratch, Operand(map));
   B(ne, &fail);
   Jump(success, RelocInfo::CODE_TARGET);
   Bind(&fail);
 }
 
 
 void MacroAssembler::TestMapBitfield(Register object, uint64_t mask) {
-  Ldr(Tmp0(), FieldMemOperand(object, HeapObject::kMapOffset));
-  Ldrb(Tmp0(), FieldMemOperand(Tmp0(), Map::kBitFieldOffset));
-  Tst(Tmp0(), mask);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
+  Ldrb(temp, FieldMemOperand(temp, Map::kBitFieldOffset));
+  Tst(temp, mask);
 }
 
 
 void MacroAssembler::LoadElementsKind(Register result, Register object) {
   // Load map.
   __ Ldr(result, FieldMemOperand(object, HeapObject::kMapOffset));
   // Load the map's "bit field 2".
   __ Ldrb(result, FieldMemOperand(result, Map::kBitField2Offset));
   // Retrieve elements_kind from bit field 2.
   __ Ubfx(result, result, Map::kElementsKindShift, Map::kElementsKindBitCount);
@@ skipping 51 matching lines @@
   Bind(&non_instance);
   Ldr(result, FieldMemOperand(result, Map::kConstructorOffset));
 
   // All done.
   Bind(&done);
 }
 
 
 void MacroAssembler::CompareRoot(const Register& obj,
                                  Heap::RootListIndex index) {
-  ASSERT(!AreAliased(obj, Tmp0()));
-  LoadRoot(Tmp0(), index);
-  Cmp(obj, Tmp0());
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  ASSERT(!AreAliased(obj, temp));
+  LoadRoot(temp, index);
+  Cmp(obj, temp);
 }
 
 
 void MacroAssembler::JumpIfRoot(const Register& obj,
                                 Heap::RootListIndex index,
                                 Label* if_equal) {
   CompareRoot(obj, index);
   B(eq, if_equal);
 }
 
@@ skipping 176 matching lines @@
   Cmp(index, index_type == kIndexIsSmi ? scratch : Operand::UntagSmi(scratch));
   Check(lt, kIndexIsTooLarge);
 
   ASSERT_EQ(0, Smi::FromInt(0));
   Cmp(index, 0);
   Check(ge, kIndexIsNegative);
 }
 
 
 void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
-                                            Register scratch,
+                                            Register scratch1,
+                                            Register scratch2,
                                             Label* miss) {
-  // TODO(jbramley): Sort out the uses of Tmp0() and Tmp1() in this function.
-  // The ARM version takes two scratch registers, and that should be enough for
-  // all of the checks.
-
+  ASSERT(!AreAliased(holder_reg, scratch1, scratch2));
   Label same_contexts;
 
-  ASSERT(!AreAliased(holder_reg, scratch));
-
   // Load current lexical context from the stack frame.
-  Ldr(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
+  Ldr(scratch1, MemOperand(fp, StandardFrameConstants::kContextOffset));
   // In debug mode, make sure the lexical context is set.
 #ifdef DEBUG
-  Cmp(scratch, 0);
+  Cmp(scratch1, 0);
   Check(ne, kWeShouldNotHaveAnEmptyLexicalContext);
 #endif
 
   // Load the native context of the current context.
   int offset =
       Context::kHeaderSize + Context::GLOBAL_OBJECT_INDEX * kPointerSize;
-  Ldr(scratch, FieldMemOperand(scratch, offset));
-  Ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  Ldr(scratch1, FieldMemOperand(scratch1, offset));
+  Ldr(scratch1, FieldMemOperand(scratch1, GlobalObject::kNativeContextOffset));
 
   // Check the context is a native context.
   if (emit_debug_code()) {
     // Read the first word and compare to the global_context_map.
-    Register temp = Tmp1();
-    Ldr(temp, FieldMemOperand(scratch, HeapObject::kMapOffset));
-    CompareRoot(temp, Heap::kNativeContextMapRootIndex);
+    Ldr(scratch2, FieldMemOperand(scratch1, HeapObject::kMapOffset));
+    CompareRoot(scratch2, Heap::kNativeContextMapRootIndex);
     Check(eq, kExpectedNativeContext);
   }
 
   // Check if both contexts are the same.
-  ldr(Tmp0(), FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
-  cmp(scratch, Tmp0());
-  b(&same_contexts, eq);
+  Ldr(scratch2, FieldMemOperand(holder_reg,
+                                JSGlobalProxy::kNativeContextOffset));
+  Cmp(scratch1, scratch2);
+  B(&same_contexts, eq);
 
   // Check the context is a native context.
   if (emit_debug_code()) {
-    // Move Tmp0() into a different register, as CompareRoot will use it.
-    Register temp = Tmp1();
-    mov(temp, Tmp0());
-    CompareRoot(temp, Heap::kNullValueRootIndex);
+    // We're short on scratch registers here, so use holder_reg as a scratch.
+    Push(holder_reg);
+    Register scratch3 = holder_reg;
+
+    CompareRoot(scratch2, Heap::kNullValueRootIndex);
     Check(ne, kExpectedNonNullContext);
 
-    Ldr(temp, FieldMemOperand(temp, HeapObject::kMapOffset));
-    CompareRoot(temp, Heap::kNativeContextMapRootIndex);
+    Ldr(scratch3, FieldMemOperand(scratch2, HeapObject::kMapOffset));
+    CompareRoot(scratch3, Heap::kNativeContextMapRootIndex);
     Check(eq, kExpectedNativeContext);
-
-    // Let's consider that Tmp0() has been cloberred by the MacroAssembler.
-    // We reload it with its value.
-    ldr(Tmp0(), FieldMemOperand(holder_reg,
-                                JSGlobalProxy::kNativeContextOffset));
+    Pop(holder_reg);
   }
 
   // Check that the security token in the calling global object is
   // compatible with the security token in the receiving global
   // object.
   int token_offset = Context::kHeaderSize +
                      Context::SECURITY_TOKEN_INDEX * kPointerSize;
 
-  ldr(scratch, FieldMemOperand(scratch, token_offset));
-  ldr(Tmp0(), FieldMemOperand(Tmp0(), token_offset));
-  cmp(scratch, Tmp0());
-  b(miss, ne);
+  Ldr(scratch1, FieldMemOperand(scratch1, token_offset));
+  Ldr(scratch2, FieldMemOperand(scratch2, token_offset));
+  Cmp(scratch1, scratch2);
+  B(miss, ne);
 
-  bind(&same_contexts);
+  Bind(&same_contexts);
 }
 
 
 // Compute the hash code from the untagged key. This must be kept in sync with
 // ComputeIntegerHash in utils.h and KeyedLoadGenericElementStub in
 // code-stub-hydrogen.cc
 void MacroAssembler::GetNumberHash(Register key, Register scratch) {
   ASSERT(!AreAliased(key, scratch));
 
   // Xor original key with a seed.
@@ skipping 82 matching lines @@
 
   // Get the value at the masked, scaled index and return.
   const int kValueOffset =
       SeededNumberDictionary::kElementsStartOffset + kPointerSize;
   Ldr(result, FieldMemOperand(scratch2, kValueOffset));
 }
 
 
 void MacroAssembler::RememberedSetHelper(Register object,  // For debug tests.
                                          Register address,
-                                         Register scratch,
+                                         Register scratch1,
                                          SaveFPRegsMode fp_mode,
                                          RememberedSetFinalAction and_then) {
-  ASSERT(!AreAliased(object, address, scratch));
+  ASSERT(!AreAliased(object, address, scratch1));
   Label done, store_buffer_overflow;
   if (emit_debug_code()) {
     Label ok;
     JumpIfNotInNewSpace(object, &ok);
     Abort(kRememberedSetPointerInNewSpace);
     bind(&ok);
   }
+  UseScratchRegisterScope temps(this);
+  Register scratch2 = temps.AcquireX();
+
   // Load store buffer top.
-  Mov(Tmp0(), Operand(ExternalReference::store_buffer_top(isolate())));
-  Ldr(scratch, MemOperand(Tmp0()));
+  Mov(scratch2, Operand(ExternalReference::store_buffer_top(isolate())));
+  Ldr(scratch1, MemOperand(scratch2));
   // Store pointer to buffer and increment buffer top.
-  Str(address, MemOperand(scratch, kPointerSize, PostIndex));
+  Str(address, MemOperand(scratch1, kPointerSize, PostIndex));
   // Write back new top of buffer.
-  Str(scratch, MemOperand(Tmp0()));
+  Str(scratch1, MemOperand(scratch2));
   // Call stub on end of buffer.
   // Check for end of buffer.
   ASSERT(StoreBuffer::kStoreBufferOverflowBit ==
          (1 << (14 + kPointerSizeLog2)));
   if (and_then == kFallThroughAtEnd) {
-    Tbz(scratch, (14 + kPointerSizeLog2), &done);
+    Tbz(scratch1, (14 + kPointerSizeLog2), &done);
   } else {
     ASSERT(and_then == kReturnAtEnd);
-    Tbnz(scratch, (14 + kPointerSizeLog2), &store_buffer_overflow);
+    Tbnz(scratch1, (14 + kPointerSizeLog2), &store_buffer_overflow);
     Ret();
   }
 
   Bind(&store_buffer_overflow);
   Push(lr);
   StoreBufferOverflowStub store_buffer_overflow_stub =
       StoreBufferOverflowStub(fp_mode);
   CallStub(&store_buffer_overflow_stub);
   Pop(lr);
 
@@ skipping 15 matching lines @@
   // Safepoints expect a block of kNumSafepointRegisters values on the stack, so
   // adjust the stack for unsaved registers.
   const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
   ASSERT(num_unsaved >= 0);
   Claim(num_unsaved);
   PushXRegList(kSafepointSavedRegisters);
 }
 
 
 void MacroAssembler::PushSafepointFPRegisters() {
-  PushCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSize,
+  PushCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSizeInBits,
                             FPRegister::kAllocatableFPRegisters));
 }
 
 
 void MacroAssembler::PopSafepointFPRegisters() {
-  PopCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSize,
+  PopCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSizeInBits,
                            FPRegister::kAllocatableFPRegisters));
 }
 
 
 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
   // Make sure the safepoint registers list is what we expect.
   ASSERT(CPURegList::GetSafepointSavedRegisters().list() == 0x6ffcffff);
 
   // Safepoint registers are stored contiguously on the stack, but not all the
   // registers are saved. The following registers are excluded:
@@ skipping 85 matching lines @@
 
   // Clobber clobbered input registers when running with the debug-code flag
   // turned on to provoke errors.
   if (emit_debug_code()) {
     Mov(value, Operand(BitCast<int64_t>(kZapValue + 4)));
     Mov(scratch, Operand(BitCast<int64_t>(kZapValue + 8)));
   }
 }
 
 
-// Will clobber: object, address, value, Tmp0(), Tmp1().
+// Will clobber: object, address, value.
 // If lr_status is kLRHasBeenSaved, lr will also be clobbered.
 //
 // The register 'object' contains a heap object pointer. The heap object tag is
 // shifted away.
 void MacroAssembler::RecordWrite(Register object,
                                  Register address,
                                  Register value,
                                  LinkRegisterStatus lr_status,
                                  SaveFPRegsMode fp_mode,
                                  RememberedSetAction remembered_set_action,
                                  SmiCheck smi_check) {
   ASM_LOCATION("MacroAssembler::RecordWrite");
   ASSERT(!AreAliased(object, value));
 
   if (emit_debug_code()) {
-    Ldr(Tmp0(), MemOperand(address));
-    Cmp(Tmp0(), value);
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
+
+    Ldr(temp, MemOperand(address));
+    Cmp(temp, value);
     Check(eq, kWrongAddressOrValuePassedToRecordWrite);
   }
 
   // Count number of write barriers in generated code.
   isolate()->counters()->write_barriers_static()->Increment();
   // TODO(mstarzinger): Dynamic counter missing.
 
   // First, check if a write barrier is even needed. The tests below
   // catch stores of smis and stores into the young generation.
   Label done;
@@ skipping 44 matching lines @@
     Tbz(reg, 1, &color_is_valid);
     Abort(kUnexpectedColorFound);
     Bind(&color_is_valid);
   }
 }
 
 
 void MacroAssembler::GetMarkBits(Register addr_reg,
                                  Register bitmap_reg,
                                  Register shift_reg) {
-  ASSERT(!AreAliased(addr_reg, bitmap_reg, shift_reg, no_reg));
+  ASSERT(!AreAliased(addr_reg, bitmap_reg, shift_reg));
+  ASSERT(addr_reg.Is64Bits() && bitmap_reg.Is64Bits() && shift_reg.Is64Bits());
   // addr_reg is divided into fields:
   // |63        page base        20|19    high      8|7   shift   3|2  0|
   // 'high' gives the index of the cell holding color bits for the object.
   // 'shift' gives the offset in the cell for this object's color.
   const int kShiftBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
-  Ubfx(Tmp0(), addr_reg, kShiftBits, kPageSizeBits - kShiftBits);
+  UseScratchRegisterScope temps(this);
+  Register temp = temps.AcquireX();
+  Ubfx(temp, addr_reg, kShiftBits, kPageSizeBits - kShiftBits);
   Bic(bitmap_reg, addr_reg, Page::kPageAlignmentMask);
-  Add(bitmap_reg, bitmap_reg, Operand(Tmp0(), LSL, Bitmap::kBytesPerCellLog2));
+  Add(bitmap_reg, bitmap_reg, Operand(temp, LSL, Bitmap::kBytesPerCellLog2));
   // bitmap_reg:
   // |63        page base        20|19 zeros 15|14      high      3|2  0|
   Ubfx(shift_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);
 }
 
 
 void MacroAssembler::HasColor(Register object,
                               Register bitmap_scratch,
                               Register shift_scratch,
                               Label* has_color,
@@ skipping 203 matching lines @@
 void MacroAssembler::AssertRegisterIsClear(Register reg, BailoutReason reason) {
   if (emit_debug_code()) {
     CheckRegisterIsClear(reg, reason);
   }
 }
 
 
 void MacroAssembler::AssertRegisterIsRoot(Register reg,
                                           Heap::RootListIndex index,
                                           BailoutReason reason) {
-  // CompareRoot uses Tmp0().
-  ASSERT(!reg.Is(Tmp0()));
   if (emit_debug_code()) {
     CompareRoot(reg, index);
     Check(eq, reason);
   }
 }
 
 
 void MacroAssembler::AssertFastElements(Register elements) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     Label ok;
     Ldr(temp, FieldMemOperand(elements, HeapObject::kMapOffset));
     JumpIfRoot(temp, Heap::kFixedArrayMapRootIndex, &ok);
     JumpIfRoot(temp, Heap::kFixedDoubleArrayMapRootIndex, &ok);
     JumpIfRoot(temp, Heap::kFixedCOWArrayMapRootIndex, &ok);
     Abort(kJSObjectWithFastElementsMapHasSlowElements);
     Bind(&ok);
   }
 }
 
 
 void MacroAssembler::AssertIsString(const Register& object) {
   if (emit_debug_code()) {
-    Register temp = Tmp1();
+    UseScratchRegisterScope temps(this);
+    Register temp = temps.AcquireX();
     STATIC_ASSERT(kSmiTag == 0);
     Tst(object, Operand(kSmiTagMask));
     Check(ne, kOperandIsNotAString);
     Ldr(temp, FieldMemOperand(object, HeapObject::kMapOffset));
     CompareInstanceType(temp, temp, FIRST_NONSTRING_TYPE);
     Check(lo, kOperandIsNotAString);
   }
 }
 
 
@@ skipping 26 matching lines @@
   }
 #endif
 
   // Abort is used in some contexts where csp is the stack pointer. In order to
   // simplify the CallRuntime code, make sure that jssp is the stack pointer.
   // There is no risk of register corruption here because Abort doesn't return.
   Register old_stack_pointer = StackPointer();
   SetStackPointer(jssp);
   Mov(jssp, old_stack_pointer);
 
+  // We need some scratch registers for the MacroAssembler, so make sure we have
+  // some. This is safe here because Abort never returns.
+  RegList old_tmp_list = TmpList()->list();
+  TmpList()->Combine(ip0);
+  TmpList()->Combine(ip1);
+
   if (use_real_aborts()) {
     // Avoid infinite recursion; Push contains some assertions that use Abort.
     NoUseRealAbortsScope no_real_aborts(this);
 
     Mov(x0, Operand(Smi::FromInt(reason)));
     Push(x0);
 
     if (!has_frame_) {
       // We don't actually want to generate a pile of code for this, so just
       // claim there is a stack frame, without generating one.
       FrameScope scope(this, StackFrame::NONE);
       CallRuntime(Runtime::kAbort, 1);
     } else {
       CallRuntime(Runtime::kAbort, 1);
     }
   } else {
     // Load the string to pass to Printf.
     Label msg_address;
     Adr(x0, &msg_address);
 
     // Call Printf directly to report the error.
     CallPrintf();
 
     // We need a way to stop execution on both the simulator and real hardware,
     // and Unreachable() is the best option.
     Unreachable();
 
     // Emit the message string directly in the instruction stream.
     {
-      BlockConstPoolScope scope(this);
+      BlockPoolsScope scope(this);
       Bind(&msg_address);
       EmitStringData(GetBailoutReason(reason));
     }
   }
 
   SetStackPointer(old_stack_pointer);
+  TmpList()->set_list(old_tmp_list);
 }
 
 
 void MacroAssembler::LoadTransitionedArrayMapConditional(
     ElementsKind expected_kind,
     ElementsKind transitioned_kind,
     Register map_in_out,
-    Register scratch,
+    Register scratch1,
+    Register scratch2,
     Label* no_map_match) {
   // Load the global or builtins object from the current context.
-  Ldr(scratch, GlobalObjectMemOperand());
-  Ldr(scratch, FieldMemOperand(scratch, GlobalObject::kNativeContextOffset));
+  Ldr(scratch1, GlobalObjectMemOperand());
+  Ldr(scratch1, FieldMemOperand(scratch1, GlobalObject::kNativeContextOffset));
 
   // Check that the function's map is the same as the expected cached map.
-  Ldr(scratch, ContextMemOperand(scratch, Context::JS_ARRAY_MAPS_INDEX));
+  Ldr(scratch1, ContextMemOperand(scratch1, Context::JS_ARRAY_MAPS_INDEX));
   size_t offset = (expected_kind * kPointerSize) + FixedArrayBase::kHeaderSize;
-  Ldr(Tmp0(), FieldMemOperand(scratch, offset));
-  Cmp(map_in_out, Tmp0());
+  Ldr(scratch2, FieldMemOperand(scratch1, offset));
+  Cmp(map_in_out, scratch2);
   B(ne, no_map_match);
 
   // Use the transitioned cached map.
   offset = (transitioned_kind * kPointerSize) + FixedArrayBase::kHeaderSize;
-  Ldr(map_in_out, FieldMemOperand(scratch, offset));
+  Ldr(map_in_out, FieldMemOperand(scratch1, offset));
 }
 
 
 void MacroAssembler::LoadGlobalFunction(int index, Register function) {
   // Load the global or builtins object from the current context.
   Ldr(function, GlobalObjectMemOperand());
   // Load the native context from the global or builtins object.
   Ldr(function, FieldMemOperand(function,
                                 GlobalObject::kNativeContextOffset));
   // Load the function from the native context.
@@ skipping 21 matching lines @@
 // PrintfNoPreserve after setting up one or more PreserveRegisterScopes.
 void MacroAssembler::PrintfNoPreserve(const char * format,
                                       const CPURegister& arg0,
                                       const CPURegister& arg1,
                                       const CPURegister& arg2,
                                       const CPURegister& arg3) {
   // We cannot handle a caller-saved stack pointer. It doesn't make much sense
   // in most cases anyway, so this restriction shouldn't be too serious.
   ASSERT(!kCallerSaved.IncludesAliasOf(__ StackPointer()));
 
-  // We cannot print Tmp0() or Tmp1() as they're used internally by the macro
-  // assembler. We cannot print the stack pointer because it is typically used
-  // to preserve caller-saved registers (using other Printf variants which
-  // depend on this helper).
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg0));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg1));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg2));
-  ASSERT(!AreAliased(Tmp0(), Tmp1(), StackPointer(), arg3));
+  // Make sure that the macro assembler doesn't try to use any of our arguments
+  // as scratch registers.
+  ASSERT(!TmpList()->IncludesAliasOf(arg0, arg1, arg2, arg3));
+  ASSERT(!FPTmpList()->IncludesAliasOf(arg0, arg1, arg2, arg3));
+
+  // We cannot print the stack pointer because it is typically used to preserve
+  // caller-saved registers (using other Printf variants which depend on this
+  // helper).
+  ASSERT(!AreAliased(arg0, StackPointer()));
+  ASSERT(!AreAliased(arg1, StackPointer()));
+  ASSERT(!AreAliased(arg2, StackPointer()));
+  ASSERT(!AreAliased(arg3, StackPointer()));
 
   static const int kMaxArgCount = 4;
   // Assume that we have the maximum number of arguments until we know
   // otherwise.
   int arg_count = kMaxArgCount;
 
   // The provided arguments.
   CPURegister args[kMaxArgCount] = {arg0, arg1, arg2, arg3};
 
   // The PCS registers where the arguments need to end up.
@@ skipping 82 matching lines @@
   // Load the format string into x0, as per the procedure-call standard.
   //
   // To make the code as portable as possible, the format string is encoded
   // directly in the instruction stream. It might be cleaner to encode it in a
   // literal pool, but since Printf is usually used for debugging, it is
   // beneficial for it to be minimally dependent on other features.
   Label format_address;
   Adr(x0, &format_address);
 
   // Emit the format string directly in the instruction stream.
-  { BlockConstPoolScope scope(this);
+  { BlockPoolsScope scope(this);
     Label after_data;
     B(&after_data);
     Bind(&format_address);
     EmitStringData(format);
     Unreachable();
     Bind(&after_data);
   }
 
   // We don't pass any arguments on the stack, but we still need to align the C
   // stack pointer to a 16-byte boundary for PCS compliance.
@@ skipping 18 matching lines @@
   Call(FUNCTION_ADDR(printf), RelocInfo::EXTERNAL_REFERENCE);
 #endif
 }
 
 
 void MacroAssembler::Printf(const char * format,
                             const CPURegister& arg0,
                             const CPURegister& arg1,
                             const CPURegister& arg2,
                             const CPURegister& arg3) {
+  // Printf is expected to preserve all registers, so make sure that none are
+  // available as scratch registers until we've preserved them.
+  RegList old_tmp_list = TmpList()->list();
+  RegList old_fp_tmp_list = FPTmpList()->list();
+  TmpList()->set_list(0);
+  FPTmpList()->set_list(0);
+
   // Preserve all caller-saved registers as well as NZCV.
   // If csp is the stack pointer, PushCPURegList asserts that the size of each
   // list is a multiple of 16 bytes.
   PushCPURegList(kCallerSaved);
   PushCPURegList(kCallerSavedFP);
-  // Use Tmp0() as a scratch register. It is not accepted by Printf so it will
-  // never overlap an argument register.
-  Mrs(Tmp0(), NZCV);
-  Push(Tmp0(), xzr);
+
+  // We can use caller-saved registers as scratch values (except for argN).
+  CPURegList tmp_list = kCallerSaved;
+  CPURegList fp_tmp_list = kCallerSavedFP;
+  tmp_list.Remove(arg0, arg1, arg2, arg3);
+  fp_tmp_list.Remove(arg0, arg1, arg2, arg3);
+  TmpList()->set_list(tmp_list.list());
+  FPTmpList()->set_list(fp_tmp_list.list());
+
+  // Preserve NZCV.
+  { UseScratchRegisterScope temps(this);
+    Register tmp = temps.AcquireX();
+    Mrs(tmp, NZCV);
+    Push(tmp, xzr);
+  }
 
   PrintfNoPreserve(format, arg0, arg1, arg2, arg3);
 
-  Pop(xzr, Tmp0());
-  Msr(NZCV, Tmp0());
+  { UseScratchRegisterScope temps(this);
+    Register tmp = temps.AcquireX();
+    Pop(xzr, tmp);
+    Msr(NZCV, tmp);
+  }
+
   PopCPURegList(kCallerSavedFP);
   PopCPURegList(kCallerSaved);
+
+  TmpList()->set_list(old_tmp_list);
+  FPTmpList()->set_list(old_fp_tmp_list);
 }
 
 
 void MacroAssembler::EmitFrameSetupForCodeAgePatching() {
   // TODO(jbramley): Other architectures use the internal memcpy to copy the
   // sequence. If this is a performance bottleneck, we should consider caching
   // the sequence and copying it in the same way.
   InstructionAccurateScope scope(this, kCodeAgeSequenceSize / kInstructionSize);
   ASSERT(jssp.Is(StackPointer()));
   EmitFrameSetupForCodeAgePatching(this);
@@ skipping 13 matching lines @@
 
 
 void MacroAssembler::EmitFrameSetupForCodeAgePatching(Assembler * assm) {
   Label start;
   __ bind(&start);
 
   // We can do this sequence using four instructions, but the code ageing
   // sequence that patches it needs five, so we use the extra space to try to
   // simplify some addressing modes and remove some dependencies (compared to
   // using two stp instructions with write-back).
-  __ sub(jssp, jssp, 4 * kXRegSizeInBytes);
-  __ sub(csp, csp, 4 * kXRegSizeInBytes);
-  __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSizeInBytes));
-  __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSizeInBytes));
+  __ sub(jssp, jssp, 4 * kXRegSize);
+  __ sub(csp, csp, 4 * kXRegSize);
+  __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSize));
+  __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSize));
   __ add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp);
 
   __ AssertSizeOfCodeGeneratedSince(&start, kCodeAgeSequenceSize);
 }
 
 
 void MacroAssembler::EmitCodeAgeSequence(Assembler * assm,
                                          Code * stub) {
   Label start;
   __ bind(&start);
@@ skipping 47 matching lines @@
   if (!initialized) {
     PatchingAssembler patcher(old, length);
     MacroAssembler::EmitCodeAgeSequence(&patcher, NULL);
     initialized = true;
   }
   return memcmp(sequence, old, kCodeAgeStubEntryOffset) == 0;
 }
 #endif
 
 
+void MacroAssembler::FlooringDiv(Register result,
+                                 Register dividend,
+                                 int32_t divisor) {
+  ASSERT(!AreAliased(result, dividend));
+  ASSERT(result.Is32Bits() && dividend.Is32Bits());
+  MultiplierAndShift ms(divisor);
+  Mov(result, Operand(ms.multiplier()));
+  Smull(result.X(), dividend, result);
+  Asr(result.X(), result.X(), 32);
+  if (divisor > 0 && ms.multiplier() < 0) Add(result, result, dividend);
+  if (divisor < 0 && ms.multiplier() > 0) Sub(result, result, dividend);
+  if (ms.shift() > 0) Asr(result, result, ms.shift());
+}
+
+
 #undef __
+
+
+UseScratchRegisterScope::~UseScratchRegisterScope() {
+  available_->set_list(old_available_);
+  availablefp_->set_list(old_availablefp_);
+}
+
+
+Register UseScratchRegisterScope::AcquireSameSizeAs(const Register& reg) {
+  int code = AcquireNextAvailable(available_).code();
+  return Register::Create(code, reg.SizeInBits());
+}
+
+
+FPRegister UseScratchRegisterScope::AcquireSameSizeAs(const FPRegister& reg) {
+  int code = AcquireNextAvailable(availablefp_).code();
+  return FPRegister::Create(code, reg.SizeInBits());
+}
+
+
+CPURegister UseScratchRegisterScope::AcquireNextAvailable(
+    CPURegList* available) {
+  CHECK(!available->IsEmpty());
+  CPURegister result = available->PopLowestIndex();
+  ASSERT(!AreAliased(result, xzr, csp));
+  return result;
+}
+
+
 #define __ masm->
 
 
 void InlineSmiCheckInfo::Emit(MacroAssembler* masm, const Register& reg,
                               const Label* smi_check) {
-  Assembler::BlockConstPoolScope scope(masm);
+  Assembler::BlockPoolsScope scope(masm);
   if (reg.IsValid()) {
     ASSERT(smi_check->is_bound());
     ASSERT(reg.Is64Bits());
 
     // Encode the register (x0-x30) in the lowest 5 bits, then the offset to
     // 'check' in the other bits. The possible offset is limited in that we
     // use BitField to pack the data, and the underlying data type is a
     // uint32_t.
     uint32_t delta = __ InstructionsGeneratedSince(smi_check);
     __ InlineData(RegisterBits::encode(reg.code()) | DeltaBits::encode(delta));
@@ skipping 25 matching lines @@
   }
 }
 
 
 #undef __
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64