Experimental parser: merge r19949

src/a64/instructions-a64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 49 matching lines @@
 
 // This value is a signalling NaN as both a double and as a float (taking the
 // least-significant word).
 DEFINE_DOUBLE(kFP64SignallingNaN, 0x7ff000007f800001);
 DEFINE_FLOAT(kFP32SignallingNaN, 0x7f800001);
 
 // A similar value, but as a quiet NaN.
 DEFINE_DOUBLE(kFP64QuietNaN, 0x7ff800007fc00001);
 DEFINE_FLOAT(kFP32QuietNaN, 0x7fc00001);
 
+// The default NaN values (for FPCR.DN=1).
+DEFINE_DOUBLE(kFP64DefaultNaN, 0x7ff8000000000000UL);
+DEFINE_FLOAT(kFP32DefaultNaN, 0x7fc00000);
+
 #undef DEFINE_FLOAT
 #undef DEFINE_DOUBLE
 
 
 enum LSDataSize {
   LSByte        = 0,
   LSHalfword    = 1,
   LSWord        = 2,
   LSDoubleWord  = 3
 };
@@ skipping 28 matching lines @@
 
 enum Reg31Mode {
   Reg31IsStackPointer,
   Reg31IsZeroRegister
 };
 
 // Instructions. ---------------------------------------------------------------
 
 class Instruction {
  public:
-  Instr InstructionBits() const {
-    Instr bits;
-    memcpy(&bits, this, sizeof(bits));
-    return bits;
+  V8_INLINE Instr InstructionBits() const {
+    return *reinterpret_cast<const Instr*>(this);
   }
 
-  void SetInstructionBits(Instr new_instr) {
-    memcpy(this, &new_instr, sizeof(new_instr));
+  V8_INLINE void SetInstructionBits(Instr new_instr) {
+    *reinterpret_cast<Instr*>(this) = new_instr;
   }
 
   int Bit(int pos) const {
     return (InstructionBits() >> pos) & 1;
   }
 
   uint32_t Bits(int msb, int lsb) const {
     return unsigned_bitextract_32(msb, lsb, InstructionBits());
   }
 
@@ skipping 222 matching lines @@
   // a PC-relative addressing instruction.
   void SetImmPCOffsetTarget(Instruction* target);
   // Patch a literal load instruction to load from 'source'.
   void SetImmLLiteral(Instruction* source);
 
   uint8_t* LiteralAddress() {
     int offset = ImmLLiteral() << kLiteralEntrySizeLog2;
     return reinterpret_cast<uint8_t*>(this) + offset;
   }
 
-  uint32_t Literal32() {
-    uint32_t literal;
-    memcpy(&literal, LiteralAddress(), sizeof(literal));
-
-    return literal;
-  }
-
-  uint64_t Literal64() {
-    uint64_t literal;
-    memcpy(&literal, LiteralAddress(), sizeof(literal));
-
-    return literal;
-  }
-
-  float LiteralFP32() {
-    return rawbits_to_float(Literal32());
-  }
-
-  double LiteralFP64() {
-    return rawbits_to_double(Literal64());
-  }
-
   Instruction* NextInstruction() {
     return this + kInstructionSize;
   }
 
   Instruction* InstructionAtOffset(int64_t offset) {
     ASSERT(IsAligned(reinterpret_cast<uintptr_t>(this) + offset,
                      kInstructionSize));
     return this + offset;
   }
 
@@ skipping 107 matching lines @@
   TRACE_ENABLE   = 1 << 6,
   TRACE_DISABLE  = 2 << 6,
   TRACE_OVERRIDE = 3 << 6
 };
 
 
 } }  // namespace v8::internal
 
 
 #endif  // V8_A64_INSTRUCTIONS_A64_H_