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Issue 19560003: [v8-dev] ARM: Make double registers low/high safe (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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3104 (instr->Bit(23) == 0x0)) { 3104 (instr->Bit(23) == 0x0)) {
3105 // vmov (ARM core register to scalar) 3105 // vmov (ARM core register to scalar)
3106 int vd = instr->Bits(19, 16) | (instr->Bit(7) << 4); 3106 int vd = instr->Bits(19, 16) | (instr->Bit(7) << 4);
3107 double dd_value = get_double_from_d_register(vd); 3107 double dd_value = get_double_from_d_register(vd);
3108 int32_t data[2]; 3108 int32_t data[2];
3109 OS::MemCopy(data, &dd_value, 8); 3109 OS::MemCopy(data, &dd_value, 8);
3110 data[instr->Bit(21)] = get_register(instr->RtValue()); 3110 data[instr->Bit(21)] = get_register(instr->RtValue());
3111 OS::MemCopy(&dd_value, data, 8); 3111 OS::MemCopy(&dd_value, data, 8);
3112 set_d_register_from_double(vd, dd_value); 3112 set_d_register_from_double(vd, dd_value);
3113 } else if ((instr->VLValue() == 0x1) && 3113 } else if ((instr->VLValue() == 0x1) &&
3114 (instr->VCValue() == 0x1) &&
3115 (instr->Bit(23) == 0x0)) {
3116 // vmov (scalar to ARM core register)
3117 int vn = instr->Bits(19, 16) | (instr->Bit(7) << 4);
3118 double dn_value = get_double_from_d_register(vn);
3119 int32_t data[2];
3120 OS::MemCopy(data, &dn_value, 8);
3121 set_register(instr->RtValue(), data[instr->Bit(21)]);
3122 } else if ((instr->VLValue() == 0x1) &&
3114 (instr->VCValue() == 0x0) && 3123 (instr->VCValue() == 0x0) &&
3115 (instr->VAValue() == 0x7) && 3124 (instr->VAValue() == 0x7) &&
3116 (instr->Bits(19, 16) == 0x1)) { 3125 (instr->Bits(19, 16) == 0x1)) {
3117 // vmrs 3126 // vmrs
3118 uint32_t rt = instr->RtValue(); 3127 uint32_t rt = instr->RtValue();
3119 if (rt == 0xF) { 3128 if (rt == 0xF) {
3120 Copy_FPSCR_to_APSR(); 3129 Copy_FPSCR_to_APSR();
3121 } else { 3130 } else {
3122 // Emulate FPSCR from the Simulator flags. 3131 // Emulate FPSCR from the Simulator flags.
3123 uint32_t fpscr = (n_flag_FPSCR_ << 31) | 3132 uint32_t fpscr = (n_flag_FPSCR_ << 31) |
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3896 uintptr_t address = *stack_slot; 3905 uintptr_t address = *stack_slot;
3897 set_register(sp, current_sp + sizeof(uintptr_t)); 3906 set_register(sp, current_sp + sizeof(uintptr_t));
3898 return address; 3907 return address;
3899 } 3908 }
3900 3909
3901 } } // namespace v8::internal 3910 } } // namespace v8::internal
3902 3911
3903 #endif // USE_SIMULATOR 3912 #endif // USE_SIMULATOR
3904 3913
3905 #endif // V8_TARGET_ARCH_ARM 3914 #endif // V8_TARGET_ARCH_ARM
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