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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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67 #define DOUBLE_REGISTERS(V) \ | 67 #define DOUBLE_REGISTERS(V) \ |
68 V(stX_0) \ | 68 V(stX_0) \ |
69 V(stX_1) \ | 69 V(stX_1) \ |
70 V(stX_2) \ | 70 V(stX_2) \ |
71 V(stX_3) \ | 71 V(stX_3) \ |
72 V(stX_4) \ | 72 V(stX_4) \ |
73 V(stX_5) \ | 73 V(stX_5) \ |
74 V(stX_6) \ | 74 V(stX_6) \ |
75 V(stX_7) | 75 V(stX_7) |
76 | 76 |
| 77 #define FLOAT_REGISTERS DOUBLE_REGISTERS |
| 78 |
77 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ | 79 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
78 V(stX_0) \ | 80 V(stX_0) \ |
79 V(stX_1) \ | 81 V(stX_1) \ |
80 V(stX_2) \ | 82 V(stX_2) \ |
81 V(stX_3) \ | 83 V(stX_3) \ |
82 V(stX_4) \ | 84 V(stX_4) \ |
83 V(stX_5) | 85 V(stX_5) |
84 | 86 |
85 // CPU Registers. | 87 // CPU Registers. |
86 // | 88 // |
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138 // Unfortunately we can't make this private in a struct. | 140 // Unfortunately we can't make this private in a struct. |
139 int reg_code; | 141 int reg_code; |
140 }; | 142 }; |
141 | 143 |
142 | 144 |
143 #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; | 145 #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; |
144 GENERAL_REGISTERS(DECLARE_REGISTER) | 146 GENERAL_REGISTERS(DECLARE_REGISTER) |
145 #undef DECLARE_REGISTER | 147 #undef DECLARE_REGISTER |
146 const Register no_reg = {Register::kCode_no_reg}; | 148 const Register no_reg = {Register::kCode_no_reg}; |
147 | 149 |
148 | 150 struct X87Register { |
149 struct DoubleRegister { | |
150 enum Code { | 151 enum Code { |
151 #define REGISTER_CODE(R) kCode_##R, | 152 #define REGISTER_CODE(R) kCode_##R, |
152 DOUBLE_REGISTERS(REGISTER_CODE) | 153 DOUBLE_REGISTERS(REGISTER_CODE) |
153 #undef REGISTER_CODE | 154 #undef REGISTER_CODE |
154 kAfterLast, | 155 kAfterLast, |
155 kCode_no_reg = -1 | 156 kCode_no_reg = -1 |
156 }; | 157 }; |
157 | 158 |
158 static const int kMaxNumRegisters = Code::kAfterLast; | 159 static const int kMaxNumRegisters = Code::kAfterLast; |
159 static const int kMaxNumAllocatableRegisters = 6; | 160 static const int kMaxNumAllocatableRegisters = 6; |
160 | 161 |
161 static DoubleRegister from_code(int code) { | 162 static X87Register from_code(int code) { |
162 DoubleRegister result = {code}; | 163 X87Register result = {code}; |
163 return result; | 164 return result; |
164 } | 165 } |
165 | 166 |
166 bool IsAllocatable() const; | 167 bool IsAllocatable() const; |
167 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } | 168 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } |
168 | 169 |
169 int code() const { | 170 int code() const { |
170 DCHECK(is_valid()); | 171 DCHECK(is_valid()); |
171 return reg_code; | 172 return reg_code; |
172 } | 173 } |
173 | 174 |
174 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } | 175 bool is(X87Register reg) const { return reg_code == reg.reg_code; } |
175 | 176 |
176 const char* ToString(); | 177 const char* ToString(); |
177 | 178 |
178 int reg_code; | 179 int reg_code; |
179 }; | 180 }; |
180 | 181 |
| 182 typedef X87Register FloatRegister; |
| 183 |
| 184 typedef X87Register DoubleRegister; |
| 185 |
| 186 // TODO(x87) Define SIMD registers. |
| 187 typedef X87Register Simd128Register; |
| 188 |
181 #define DECLARE_REGISTER(R) \ | 189 #define DECLARE_REGISTER(R) \ |
182 const DoubleRegister R = {DoubleRegister::kCode_##R}; | 190 const DoubleRegister R = {DoubleRegister::kCode_##R}; |
183 DOUBLE_REGISTERS(DECLARE_REGISTER) | 191 DOUBLE_REGISTERS(DECLARE_REGISTER) |
184 #undef DECLARE_REGISTER | 192 #undef DECLARE_REGISTER |
185 const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; | 193 const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; |
186 | 194 |
187 typedef DoubleRegister X87Register; | |
188 | |
189 // TODO(x87) Define SIMD registers. | |
190 typedef DoubleRegister Simd128Register; | |
191 | |
192 enum Condition { | 195 enum Condition { |
193 // any value < 0 is considered no_condition | 196 // any value < 0 is considered no_condition |
194 no_condition = -1, | 197 no_condition = -1, |
195 | 198 |
196 overflow = 0, | 199 overflow = 0, |
197 no_overflow = 1, | 200 no_overflow = 1, |
198 below = 2, | 201 below = 2, |
199 above_equal = 3, | 202 above_equal = 3, |
200 equal = 4, | 203 equal = 4, |
201 not_equal = 5, | 204 not_equal = 5, |
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1101 Assembler* assembler_; | 1104 Assembler* assembler_; |
1102 #ifdef DEBUG | 1105 #ifdef DEBUG |
1103 int space_before_; | 1106 int space_before_; |
1104 #endif | 1107 #endif |
1105 }; | 1108 }; |
1106 | 1109 |
1107 } // namespace internal | 1110 } // namespace internal |
1108 } // namespace v8 | 1111 } // namespace v8 |
1109 | 1112 |
1110 #endif // V8_X87_ASSEMBLER_X87_H_ | 1113 #endif // V8_X87_ASSEMBLER_X87_H_ |
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