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Side by Side Diff: src/s390/assembler-s390.h

Issue 1954953002: Add the concept of FloatRegister for all platforms. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase Created 4 years, 7 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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83 V(r8) V(r9) V(r10) V(fp) V(ip) V(r13) V(r14) V(sp) 83 V(r8) V(r9) V(r10) V(fp) V(ip) V(r13) V(r14) V(sp)
84 84
85 #define ALLOCATABLE_GENERAL_REGISTERS(V) \ 85 #define ALLOCATABLE_GENERAL_REGISTERS(V) \
86 V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) \ 86 V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) \
87 V(r8) V(r9) V(r13) 87 V(r8) V(r9) V(r13)
88 88
89 #define DOUBLE_REGISTERS(V) \ 89 #define DOUBLE_REGISTERS(V) \
90 V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ 90 V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \
91 V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) V(d14) V(d15) 91 V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) V(d14) V(d15)
92 92
93 #define FLOAT_REGISTERS DOUBLE_REGISTERS
94
93 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ 95 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \
94 V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ 96 V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \
95 V(d8) V(d9) V(d10) V(d11) V(d12) V(d15) V(d0) 97 V(d8) V(d9) V(d10) V(d11) V(d12) V(d15) V(d0)
96 // clang-format on 98 // clang-format on
97 99
98 // CPU Registers. 100 // CPU Registers.
99 // 101 //
100 // 1) We would prefer to use an enum, but enum values are assignment- 102 // 1) We would prefer to use an enum, but enum values are assignment-
101 // compatible with int, which has caused code-generation bugs. 103 // compatible with int, which has caused code-generation bugs.
102 // 104 //
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214 } 216 }
215 217
216 static DoubleRegister from_code(int code) { 218 static DoubleRegister from_code(int code) {
217 DoubleRegister r = {code}; 219 DoubleRegister r = {code};
218 return r; 220 return r;
219 } 221 }
220 222
221 int reg_code; 223 int reg_code;
222 }; 224 };
223 225
224 typedef DoubleRegister DoubleRegister; 226 typedef DoubleRegister FloatRegister;
227
228 // TODO(john.yan) Define SIMD registers.
229 typedef DoubleRegister Simd128Register;
225 230
226 #define DECLARE_REGISTER(R) \ 231 #define DECLARE_REGISTER(R) \
227 const DoubleRegister R = {DoubleRegister::kCode_##R}; 232 const DoubleRegister R = {DoubleRegister::kCode_##R};
228 DOUBLE_REGISTERS(DECLARE_REGISTER) 233 DOUBLE_REGISTERS(DECLARE_REGISTER)
229 #undef DECLARE_REGISTER 234 #undef DECLARE_REGISTER
230 const Register no_dreg = {Register::kCode_no_reg}; 235 const Register no_dreg = {Register::kCode_no_reg};
231 236
232 // Aliases for double registers. Defined using #define instead of 237 // Aliases for double registers. Defined using #define instead of
233 // "static const DoubleRegister&" because Clang complains otherwise when a 238 // "static const DoubleRegister&" because Clang complains otherwise when a
234 // compilation unit that includes this header doesn't use the variables. 239 // compilation unit that includes this header doesn't use the variables.
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258 263
259 const CRegister cr0 = {0}; 264 const CRegister cr0 = {0};
260 const CRegister cr1 = {1}; 265 const CRegister cr1 = {1};
261 const CRegister cr2 = {2}; 266 const CRegister cr2 = {2};
262 const CRegister cr3 = {3}; 267 const CRegister cr3 = {3};
263 const CRegister cr4 = {4}; 268 const CRegister cr4 = {4};
264 const CRegister cr5 = {5}; 269 const CRegister cr5 = {5};
265 const CRegister cr6 = {6}; 270 const CRegister cr6 = {6};
266 const CRegister cr7 = {7}; 271 const CRegister cr7 = {7};
267 272
268 // TODO(john.yan) Define SIMD registers.
269 typedef DoubleRegister Simd128Register;
270
271 // ----------------------------------------------------------------------------- 273 // -----------------------------------------------------------------------------
272 // Machine instruction Operands 274 // Machine instruction Operands
273 275
274 #if V8_TARGET_ARCH_S390X 276 #if V8_TARGET_ARCH_S390X
275 const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64; 277 const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64;
276 #else 278 #else
277 const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32; 279 const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32;
278 #endif 280 #endif
279 281
280 // Class Operand represents a shifter operand in data processing instructions 282 // Class Operand represents a shifter operand in data processing instructions
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1457 1459
1458 class EnsureSpace BASE_EMBEDDED { 1460 class EnsureSpace BASE_EMBEDDED {
1459 public: 1461 public:
1460 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } 1462 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
1461 }; 1463 };
1462 1464
1463 } // namespace internal 1465 } // namespace internal
1464 } // namespace v8 1466 } // namespace v8
1465 1467
1466 #endif // V8_S390_ASSEMBLER_S390_H_ 1468 #endif // V8_S390_ASSEMBLER_S390_H_
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