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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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67 #define DOUBLE_REGISTERS(V) \ | 67 #define DOUBLE_REGISTERS(V) \ |
68 V(xmm0) \ | 68 V(xmm0) \ |
69 V(xmm1) \ | 69 V(xmm1) \ |
70 V(xmm2) \ | 70 V(xmm2) \ |
71 V(xmm3) \ | 71 V(xmm3) \ |
72 V(xmm4) \ | 72 V(xmm4) \ |
73 V(xmm5) \ | 73 V(xmm5) \ |
74 V(xmm6) \ | 74 V(xmm6) \ |
75 V(xmm7) | 75 V(xmm7) |
76 | 76 |
| 77 #define FLOAT_REGISTERS DOUBLE_REGISTERS |
| 78 #define SIMD_REGISTERS DOUBLE_REGISTERS |
| 79 |
77 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ | 80 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
78 V(xmm1) \ | 81 V(xmm1) \ |
79 V(xmm2) \ | 82 V(xmm2) \ |
80 V(xmm3) \ | 83 V(xmm3) \ |
81 V(xmm4) \ | 84 V(xmm4) \ |
82 V(xmm5) \ | 85 V(xmm5) \ |
83 V(xmm6) \ | 86 V(xmm6) \ |
84 V(xmm7) | 87 V(xmm7) |
85 | 88 |
86 // CPU Registers. | 89 // CPU Registers. |
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139 // Unfortunately we can't make this private in a struct. | 142 // Unfortunately we can't make this private in a struct. |
140 int reg_code; | 143 int reg_code; |
141 }; | 144 }; |
142 | 145 |
143 | 146 |
144 #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; | 147 #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; |
145 GENERAL_REGISTERS(DECLARE_REGISTER) | 148 GENERAL_REGISTERS(DECLARE_REGISTER) |
146 #undef DECLARE_REGISTER | 149 #undef DECLARE_REGISTER |
147 const Register no_reg = {Register::kCode_no_reg}; | 150 const Register no_reg = {Register::kCode_no_reg}; |
148 | 151 |
149 | 152 struct XMMRegister { |
150 struct DoubleRegister { | |
151 enum Code { | 153 enum Code { |
152 #define REGISTER_CODE(R) kCode_##R, | 154 #define REGISTER_CODE(R) kCode_##R, |
153 DOUBLE_REGISTERS(REGISTER_CODE) | 155 DOUBLE_REGISTERS(REGISTER_CODE) |
154 #undef REGISTER_CODE | 156 #undef REGISTER_CODE |
155 kAfterLast, | 157 kAfterLast, |
156 kCode_no_reg = -1 | 158 kCode_no_reg = -1 |
157 }; | 159 }; |
158 | 160 |
159 static const int kMaxNumRegisters = Code::kAfterLast; | 161 static const int kMaxNumRegisters = Code::kAfterLast; |
160 | 162 |
161 static DoubleRegister from_code(int code) { | 163 static XMMRegister from_code(int code) { |
162 DoubleRegister result = {code}; | 164 XMMRegister result = {code}; |
163 return result; | 165 return result; |
164 } | 166 } |
165 | 167 |
166 bool IsAllocatable() const; | 168 bool IsAllocatable() const; |
167 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } | 169 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } |
168 | 170 |
169 int code() const { | 171 int code() const { |
170 DCHECK(is_valid()); | 172 DCHECK(is_valid()); |
171 return reg_code; | 173 return reg_code; |
172 } | 174 } |
173 | 175 |
174 bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } | 176 bool is(XMMRegister reg) const { return reg_code == reg.reg_code; } |
175 | 177 |
176 const char* ToString(); | 178 const char* ToString(); |
177 | 179 |
178 int reg_code; | 180 int reg_code; |
179 }; | 181 }; |
180 | 182 |
| 183 typedef XMMRegister FloatRegister; |
| 184 |
| 185 typedef XMMRegister DoubleRegister; |
| 186 |
| 187 typedef XMMRegister Simd128Register; |
| 188 |
181 #define DECLARE_REGISTER(R) \ | 189 #define DECLARE_REGISTER(R) \ |
182 const DoubleRegister R = {DoubleRegister::kCode_##R}; | 190 const DoubleRegister R = {DoubleRegister::kCode_##R}; |
183 DOUBLE_REGISTERS(DECLARE_REGISTER) | 191 DOUBLE_REGISTERS(DECLARE_REGISTER) |
184 #undef DECLARE_REGISTER | 192 #undef DECLARE_REGISTER |
185 const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; | 193 const DoubleRegister no_double_reg = {DoubleRegister::kCode_no_reg}; |
186 | 194 |
187 typedef DoubleRegister Simd128Register; | |
188 | |
189 typedef DoubleRegister XMMRegister; | |
190 | |
191 enum Condition { | 195 enum Condition { |
192 // any value < 0 is considered no_condition | 196 // any value < 0 is considered no_condition |
193 no_condition = -1, | 197 no_condition = -1, |
194 | 198 |
195 overflow = 0, | 199 overflow = 0, |
196 no_overflow = 1, | 200 no_overflow = 1, |
197 below = 2, | 201 below = 2, |
198 above_equal = 3, | 202 above_equal = 3, |
199 equal = 4, | 203 equal = 4, |
200 not_equal = 5, | 204 not_equal = 5, |
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1595 Assembler* assembler_; | 1599 Assembler* assembler_; |
1596 #ifdef DEBUG | 1600 #ifdef DEBUG |
1597 int space_before_; | 1601 int space_before_; |
1598 #endif | 1602 #endif |
1599 }; | 1603 }; |
1600 | 1604 |
1601 } // namespace internal | 1605 } // namespace internal |
1602 } // namespace v8 | 1606 } // namespace v8 |
1603 | 1607 |
1604 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1608 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
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