Index: src/compiler/ppc/instruction-selector-ppc.cc |
diff --git a/src/compiler/ppc/instruction-selector-ppc.cc b/src/compiler/ppc/instruction-selector-ppc.cc |
index c7eacf51d05f7e23416471d4fda094b6db0080d6..71c78ff0ff474deb0327b49976e7d291cb5effe3 100644 |
--- a/src/compiler/ppc/instruction-selector-ppc.cc |
+++ b/src/compiler/ppc/instruction-selector-ppc.cc |
@@ -1938,6 +1938,37 @@ void InstructionSelector::VisitAtomicLoad(Node* node) { |
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index)); |
} |
+void InstructionSelector::VisitAtomicStore(Node* node) { |
+ MachineRepresentation rep = AtomicStoreRepresentationOf(node->op()); |
+ PPCOperandGenerator g(this); |
+ Node* base = node->InputAt(0); |
+ Node* index = node->InputAt(1); |
+ Node* value = node->InputAt(2); |
+ ArchOpcode opcode = kArchNop; |
+ switch (rep) { |
+ case MachineRepresentation::kWord8: |
+ opcode = kAtomicStoreWord8; |
+ break; |
+ case MachineRepresentation::kWord16: |
+ opcode = kAtomicStoreWord16; |
+ break; |
+ case MachineRepresentation::kWord32: |
+ opcode = kAtomicStoreWord32; |
+ break; |
+ default: |
+ UNREACHABLE(); |
+ return; |
+ } |
+ |
+ InstructionOperand inputs[4]; |
+ size_t input_count = 0; |
+ inputs[input_count++] = g.UseUniqueRegister(base); |
+ inputs[input_count++] = g.UseUniqueRegister(index); |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ Emit(opcode | AddressingModeField::encode(kMode_MRR), |
+ 0, nullptr, input_count, inputs); |
+} |
+ |
// static |
MachineOperatorBuilder::Flags |
InstructionSelector::SupportedMachineOperatorFlags() { |