Adds more SIMD instructions for ARM.

runtime/vm/simulator_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <math.h>  // for isnan.
 #include <setjmp.h>
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
@@ skipping 916 matching lines @@
 void Simulator::set_qregister(QRegister reg, const simd_value_t& value) {
   ASSERT((reg >= 0) && (reg < kNumberOfQRegisters));
   qregisters_[reg].data_[0] = value.data_[0];
   qregisters_[reg].data_[1] = value.data_[1];
   qregisters_[reg].data_[2] = value.data_[2];
   qregisters_[reg].data_[3] = value.data_[3];
 }
 
 
 void Simulator::get_qregister(QRegister reg, simd_value_t* value) const {
-  ASSERT((reg >= 0) && (reg < kNumberOfQRegisters));
-  *value = qregisters_[reg];
+  // TODO(zra): Replace this test with an assert after we support
+  // 16 Q registers.
+  if ((reg >= 0) && (reg < kNumberOfQRegisters)) {
+    *value = qregisters_[reg];
+  }
 }
 
 
 void Simulator::set_sregister_bits(SRegister reg, int32_t value) {
   ASSERT((reg >= 0) && (reg < kNumberOfSRegisters));
   sregisters_[reg] = value;
 }
 
 
 int32_t Simulator::get_sregister_bits(SRegister reg) const {
@@ skipping 2170 matching lines @@
         // Format(instr, "vmovq 'qd, 'qm");
         for (int i = 0; i < 4; i++) {
           s8d.data_[i].u = s8m.data_[i].u;
         }
       } else {
         // Format(instr, "vorrq 'qd, 'qm");
         for (int i = 0; i < 4; i++) {
           s8d.data_[i].u = s8n.data_[i].u | s8m.data_[i].u;
         }
       }
+    } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 1) &&
+               (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
+      // Format(instr, "vandq 'qd, 'qn, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].u = s8n.data_[i].u & s8m.data_[i].u;
+      }
     } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 2) && (instr->Bits(23, 2) == 0)) {
       // Format(instr, "vminqs 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f =
             s8n.data_[i].f <= s8m.data_[i].f ? s8n.data_[i].f : s8m.data_[i].f;
       }
     } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
       // Format(instr, "vmaxqs 'qd, 'qn, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f =
           s8n.data_[i].f >= s8m.data_[i].f ? s8n.data_[i].f : s8m.data_[i].f;
       }
+    } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) &&
+               (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
+               (instr->Bit(7) == 0) && (instr->Bits(16, 4) == 9)) {
+      // Format(instr, "vabsqs 'qd, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].f = abs(s8m.data_[i].f);
+      }
+    } else if ((instr->Bits(8, 4) == 7) && (instr->Bit(4) == 0) &&
+               (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
+               (instr->Bit(7) == 1) && (instr->Bits(16, 4) == 9)) {
+      // Format(instr, "vnegqs 'qd, 'qm");
+      for (int i = 0; i < 4; i++) {
+        s8d.data_[i].f = -s8m.data_[i].f;
+      }
     } else if ((instr->Bits(7, 5) == 10) && (instr->Bit(4) == 0) &&
                (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
                (instr->Bits(16, 4) == 11)) {
       // Format(instr, "vrecpeq 'qd, 'qm");
       for (int i = 0; i < 4; i++) {
         s8d.data_[i].f = arm_recip_estimate(s8m.data_[i].f);
       }
     } else if ((instr->Bits(8, 4) == 15) && (instr->Bit(4) == 1) &&
                (instr->Bits(20, 2) == 0) && (instr->Bits(23, 2) == 0)) {
       // Format(instr, "vrecpsq 'qd, 'qn, 'qm");
@@ skipping 450 matching lines @@
   set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
   set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM)
 
 #endif  // defined TARGET_ARCH_ARM