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Side by Side Diff: src/IceInstMIPS32.h

Issue 1948093002: [Subzero][MIPS32] Implement sext, zext and trunc (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 7 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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114 InstMIPS32(const InstMIPS32 &) = delete; 114 InstMIPS32(const InstMIPS32 &) = delete;
115 InstMIPS32 &operator=(const InstMIPS32 &) = delete; 115 InstMIPS32 &operator=(const InstMIPS32 &) = delete;
116 116
117 public: 117 public:
118 enum InstKindMIPS32 { 118 enum InstKindMIPS32 {
119 k__Start = Inst::Target, 119 k__Start = Inst::Target,
120 Add, 120 Add,
121 Addiu, 121 Addiu,
122 Addu, 122 Addu,
123 And, 123 And,
124 Andi,
124 Br, 125 Br,
125 Call, 126 Call,
126 La, 127 La,
127 Label, 128 Label,
128 Lui, 129 Lui,
129 Mfhi, 130 Mfhi,
130 Mflo, 131 Mflo,
131 Mov, // actually a pseudo op for addi rd, rs, 0 132 Mov, // actually a pseudo op for addi rd, rs, 0
132 Mthi, 133 Mthi,
133 Mtlo, 134 Mtlo,
134 Mul, 135 Mul,
135 Mult, 136 Mult,
136 Multu, 137 Multu,
137 Or, 138 Or,
138 Ori, 139 Ori,
139 Ret, 140 Ret,
141 Sll,
140 Slt, 142 Slt,
141 Slti, 143 Slti,
142 Sltiu, 144 Sltiu,
143 Sltu, 145 Sltu,
146 Sra,
144 Sub, 147 Sub,
145 Subu, 148 Subu,
146 Xor, 149 Xor,
147 Xori 150 Xori
148 }; 151 };
149 152
150 static const char *getWidthString(Type Ty); 153 static const char *getWidthString(Type Ty);
151 154
152 void dump(const Cfg *Func) const override; 155 void dump(const Cfg *Func) const override;
153 156
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455 458
456 static const char *Opcode; 459 static const char *Opcode;
457 460
458 const uint32_t Imm; 461 const uint32_t Imm;
459 }; 462 };
460 463
461 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; 464 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
462 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; 465 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
463 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; 466 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
464 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; 467 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
468 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>;
465 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; 469 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
466 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; 470 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
467 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; 471 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
468 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; 472 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
469 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; 473 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
470 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; 474 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
471 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; 475 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
472 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; 476 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
473 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; 477 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
474 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; 478 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
475 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; 479 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
480 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>;
476 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; 481 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
477 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; 482 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>;
478 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; 483 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>;
479 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; 484 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
485 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
480 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; 486 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
481 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; 487 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
482 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; 488 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
483 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; 489 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>;
484 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>; 490 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>;
485 491
486 /// Handles (some of) vmov's various formats. 492 /// Handles (some of) vmov's various formats.
487 class InstMIPS32Mov final : public InstMIPS32 { 493 class InstMIPS32Mov final : public InstMIPS32 {
488 InstMIPS32Mov() = delete; 494 InstMIPS32Mov() = delete;
489 InstMIPS32Mov(const InstMIPS32Mov &) = delete; 495 InstMIPS32Mov(const InstMIPS32Mov &) = delete;
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530 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 536 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
531 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 537 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
532 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 538 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
533 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 539 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
534 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 540 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
535 541
536 } // end of namespace MIPS32 542 } // end of namespace MIPS32
537 } // end of namespace Ice 543 } // end of namespace Ice
538 544
539 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 545 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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