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Side by Side Diff: src/IceInstMIPS32.h

Issue 1948093002: [Subzero][MIPS32] Implement sext, zext and trunc (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 7 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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114 InstMIPS32(const InstMIPS32 &) = delete; 114 InstMIPS32(const InstMIPS32 &) = delete;
115 InstMIPS32 &operator=(const InstMIPS32 &) = delete; 115 InstMIPS32 &operator=(const InstMIPS32 &) = delete;
116 116
117 public: 117 public:
118 enum InstKindMIPS32 { 118 enum InstKindMIPS32 {
119 k__Start = Inst::Target, 119 k__Start = Inst::Target,
120 Add, 120 Add,
121 Addiu, 121 Addiu,
122 Addu, 122 Addu,
123 And, 123 And,
124 Andi,
124 Br, 125 Br,
125 Call, 126 Call,
126 La, 127 La,
127 Label, 128 Label,
128 Lui, 129 Lui,
129 Mfhi, 130 Mfhi,
130 Mflo, 131 Mflo,
131 Mov, // actually a pseudo op for addi rd, rs, 0 132 Mov, // actually a pseudo op for addi rd, rs, 0
132 Mthi, 133 Mthi,
133 Mtlo, 134 Mtlo,
134 Mul, 135 Mul,
135 Mult, 136 Mult,
136 Multu, 137 Multu,
137 Or, 138 Or,
138 Ori, 139 Ori,
139 Ret, 140 Ret,
141 Sll,
140 Slt, 142 Slt,
141 Slti, 143 Slti,
142 Sltiu, 144 Sltiu,
143 Sltu, 145 Sltu,
146 Sra,
144 Sub, 147 Sub,
145 Subu, 148 Subu,
146 Xor, 149 Xor,
147 Xori 150 Xori
148 }; 151 };
149 152
150 static const char *getWidthString(Type Ty); 153 static const char *getWidthString(Type Ty);
151 154
152 void dump(const Cfg *Func) const override; 155 void dump(const Cfg *Func) const override;
153 156
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397 uint32_t Imm) { 400 uint32_t Imm) {
398 return new (Func->allocate<InstMIPS32Imm16>()) 401 return new (Func->allocate<InstMIPS32Imm16>())
399 InstMIPS32Imm16(Func, Dest, Source, Imm); 402 InstMIPS32Imm16(Func, Dest, Source, Imm);
400 } 403 }
401 404
402 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, uint32_t Imm) { 405 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, uint32_t Imm) {
403 return new (Func->allocate<InstMIPS32Imm16>()) 406 return new (Func->allocate<InstMIPS32Imm16>())
404 InstMIPS32Imm16(Func, Dest, Imm); 407 InstMIPS32Imm16(Func, Dest, Imm);
405 } 408 }
406 409
410 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source,
411 ConstantInteger32 *Imm) {
412 return new (Func->allocate<InstMIPS32Imm16>())
413 InstMIPS32Imm16(Func, Dest, Source, Imm);
414 }
415
407 void emit(const Cfg *Func) const override { 416 void emit(const Cfg *Func) const override {
408 if (!BuildDefs::dump()) 417 if (!BuildDefs::dump())
409 return; 418 return;
410 Ostream &Str = Func->getContext()->getStrEmit(); 419 Ostream &Str = Func->getContext()->getStrEmit();
411 Str << "\t" << Opcode << "\t"; 420 Str << "\t" << Opcode << "\t";
412 getDest()->emit(Func); 421 getDest()->emit(Func);
413 if (getSrcSize() > 0) { 422 if (getSrcSize() > 0) {
414 Str << ", "; 423 Str << ", ";
415 getSrc(0)->emit(Func); 424 getSrc(0)->emit(Func);
416 } 425 }
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446 455
447 private: 456 private:
448 InstMIPS32Imm16(Cfg *Func, Variable *Dest, Operand *Source, uint32_t Imm) 457 InstMIPS32Imm16(Cfg *Func, Variable *Dest, Operand *Source, uint32_t Imm)
449 : InstMIPS32(Func, K, 1, Dest), Imm(Imm) { 458 : InstMIPS32(Func, K, 1, Dest), Imm(Imm) {
450 addSource(Source); 459 addSource(Source);
451 } 460 }
452 461
453 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm) 462 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm)
454 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {} 463 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {}
455 464
465 InstMIPS32Imm16(Cfg *Func, Variable *Dest, Operand *Source,
Jim Stichnoth 2016/05/06 19:55:09 Why is this new form needed? It seems to me that
sagar.thakur 2016/05/09 11:03:40 I was following arm and x86 implementation of Targ
466 ConstantInteger32 *Imm)
467 : InstMIPS32(Func, K, 1, Dest), Imm(Imm->getValue()) {
468 addSource(Source);
469 }
470
456 static const char *Opcode; 471 static const char *Opcode;
457 472
458 const uint32_t Imm; 473 const uint32_t Imm;
459 }; 474 };
460 475
461 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; 476 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>;
462 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>; 477 using InstMIPS32Addu = InstMIPS32ThreeAddrGPR<InstMIPS32::Addu>;
463 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; 478 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>;
464 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; 479 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>;
480 using InstMIPS32Andi = InstMIPS32Imm16<InstMIPS32::Andi>;
465 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; 481 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
466 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; 482 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
467 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; 483 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
468 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; 484 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
469 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; 485 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
470 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; 486 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
471 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; 487 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
472 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; 488 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
473 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; 489 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
474 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; 490 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>;
475 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; 491 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
492 using InstMIPS32Sll = InstMIPS32Imm16<InstMIPS32::Sll>;
476 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>; 493 using InstMIPS32Slt = InstMIPS32ThreeAddrGPR<InstMIPS32::Slt>;
477 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>; 494 using InstMIPS32Slti = InstMIPS32Imm16<InstMIPS32::Slti>;
478 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>; 495 using InstMIPS32Sltiu = InstMIPS32Imm16<InstMIPS32::Sltiu>;
479 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>; 496 using InstMIPS32Sltu = InstMIPS32ThreeAddrGPR<InstMIPS32::Sltu>;
497 using InstMIPS32Sra = InstMIPS32Imm16<InstMIPS32::Sra>;
480 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; 498 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>;
481 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>; 499 using InstMIPS32Subu = InstMIPS32ThreeAddrGPR<InstMIPS32::Subu>;
482 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; 500 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>;
483 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; 501 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>;
484 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>; 502 using InstMIPS32Xori = InstMIPS32Imm16<InstMIPS32::Xori>;
485 503
486 /// Handles (some of) vmov's various formats. 504 /// Handles (some of) vmov's various formats.
487 class InstMIPS32Mov final : public InstMIPS32 { 505 class InstMIPS32Mov final : public InstMIPS32 {
488 InstMIPS32Mov() = delete; 506 InstMIPS32Mov() = delete;
489 InstMIPS32Mov(const InstMIPS32Mov &) = delete; 507 InstMIPS32Mov(const InstMIPS32Mov &) = delete;
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530 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 548 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
531 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 549 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
532 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 550 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
533 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 551 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
534 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 552 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
535 553
536 } // end of namespace MIPS32 554 } // end of namespace MIPS32
537 } // end of namespace Ice 555 } // end of namespace Ice
538 556
539 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 557 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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