Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(258)

Side by Side Diff: src/arm/assembler-arm.cc

Issue 194793002: [v8-dev] ARM: safepoints frame optimization (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 502 matching lines...) Expand 10 before | Expand all | Expand 10 after
513 const Instr kStrRegFpNegOffsetPattern = 513 const Instr kStrRegFpNegOffsetPattern =
514 al | B26 | NegOffset | kRegister_fp_Code * B16; 514 al | B26 | NegOffset | kRegister_fp_Code * B16;
515 const Instr kLdrStrInstrTypeMask = 0xffff0000; 515 const Instr kLdrStrInstrTypeMask = 0xffff0000;
516 const Instr kLdrStrInstrArgumentMask = 0x0000ffff; 516 const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
517 const Instr kLdrStrOffsetMask = 0x00000fff; 517 const Instr kLdrStrOffsetMask = 0x00000fff;
518 518
519 519
520 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) 520 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
521 : AssemblerBase(isolate, buffer, buffer_size), 521 : AssemblerBase(isolate, buffer, buffer_size),
522 recorded_ast_id_(TypeFeedbackId::None()), 522 recorded_ast_id_(TypeFeedbackId::None()),
523 registers_mask_(kRegListEmpty),
524 double_registers_mask_(kRegListEmpty),
523 positions_recorder_(this) { 525 positions_recorder_(this) {
524 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); 526 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_);
525 num_pending_32_bit_reloc_info_ = 0; 527 num_pending_32_bit_reloc_info_ = 0;
526 num_pending_64_bit_reloc_info_ = 0; 528 num_pending_64_bit_reloc_info_ = 0;
527 next_buffer_check_ = 0; 529 next_buffer_check_ = 0;
528 const_pool_blocked_nesting_ = 0; 530 const_pool_blocked_nesting_ = 0;
529 no_const_pool_before_ = 0; 531 no_const_pool_before_ = 0;
530 first_const_pool_32_use_ = -1; 532 first_const_pool_32_use_ = -1;
531 first_const_pool_64_use_ = -1; 533 first_const_pool_64_use_ = -1;
532 last_bound_pos_ = 0; 534 last_bound_pos_ = 0;
(...skipping 11 matching lines...) Expand all
544 CheckConstPool(true, false); 546 CheckConstPool(true, false);
545 ASSERT(num_pending_32_bit_reloc_info_ == 0); 547 ASSERT(num_pending_32_bit_reloc_info_ == 0);
546 ASSERT(num_pending_64_bit_reloc_info_ == 0); 548 ASSERT(num_pending_64_bit_reloc_info_ == 0);
547 549
548 // Set up code descriptor. 550 // Set up code descriptor.
549 desc->buffer = buffer_; 551 desc->buffer = buffer_;
550 desc->buffer_size = buffer_size_; 552 desc->buffer_size = buffer_size_;
551 desc->instr_size = pc_offset(); 553 desc->instr_size = pc_offset();
552 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos(); 554 desc->reloc_size = (buffer_ + buffer_size_) - reloc_info_writer.pos();
553 desc->origin = this; 555 desc->origin = this;
556 desc->registers_mask = registers_mask_;
557 desc->double_registers_mask = double_registers_mask_;
554 } 558 }
555 559
556 560
557 void Assembler::Align(int m) { 561 void Assembler::Align(int m) {
558 ASSERT(m >= 4 && IsPowerOf2(m)); 562 ASSERT(m >= 4 && IsPowerOf2(m));
559 while ((pc_offset() & (m - 1)) != 0) { 563 while ((pc_offset() & (m - 1)) != 0) {
560 nop(); 564 nop();
561 } 565 }
562 } 566 }
563 567
(...skipping 2933 matching lines...) Expand 10 before | Expand all | Expand 10 after
3497 3501
3498 // Since a constant pool was just emitted, move the check offset forward by 3502 // Since a constant pool was just emitted, move the check offset forward by
3499 // the standard interval. 3503 // the standard interval.
3500 next_buffer_check_ = pc_offset() + kCheckPoolInterval; 3504 next_buffer_check_ = pc_offset() + kCheckPoolInterval;
3501 } 3505 }
3502 3506
3503 3507
3504 } } // namespace v8::internal 3508 } } // namespace v8::internal
3505 3509
3506 #endif // V8_TARGET_ARCH_ARM 3510 #endif // V8_TARGET_ARCH_ARM
OLDNEW
« src/arm/assembler-arm.h ('K') | « src/arm/assembler-arm.h ('k') | src/arm/frames-arm.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698