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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1379 | 1379 |
1380 // Store integer or FP register pair, non-temporal. | 1380 // Store integer or FP register pair, non-temporal. |
1381 void stnp(const CPURegister& rt, const CPURegister& rt2, | 1381 void stnp(const CPURegister& rt, const CPURegister& rt2, |
1382 const MemOperand& dst); | 1382 const MemOperand& dst); |
1383 | 1383 |
1384 // Load literal to register. | 1384 // Load literal to register. |
1385 void ldr(const Register& rt, uint64_t imm); | 1385 void ldr(const Register& rt, uint64_t imm); |
1386 | 1386 |
1387 // Load literal to FP register. | 1387 // Load literal to FP register. |
1388 void ldr(const FPRegister& ft, double imm); | 1388 void ldr(const FPRegister& ft, double imm); |
| 1389 void ldr(const FPRegister& ft, float imm); |
1389 | 1390 |
1390 // Move instructions. The default shift of -1 indicates that the move | 1391 // Move instructions. The default shift of -1 indicates that the move |
1391 // instruction will calculate an appropriate 16-bit immediate and left shift | 1392 // instruction will calculate an appropriate 16-bit immediate and left shift |
1392 // that is equal to the 64-bit immediate argument. If an explicit left shift | 1393 // that is equal to the 64-bit immediate argument. If an explicit left shift |
1393 // is specified (0, 16, 32 or 48), the immediate must be a 16-bit value. | 1394 // is specified (0, 16, 32 or 48), the immediate must be a 16-bit value. |
1394 // | 1395 // |
1395 // For movk, an explicit shift can be used to indicate which half word should | 1396 // For movk, an explicit shift can be used to indicate which half word should |
1396 // be overwritten, eg. movk(x0, 0, 0) will overwrite the least-significant | 1397 // be overwritten, eg. movk(x0, 0, 0) will overwrite the least-significant |
1397 // half word with zero, whereas movk(x0, 0, 48) will overwrite the | 1398 // half word with zero, whereas movk(x0, 0, 48) will overwrite the |
1398 // most-significant. | 1399 // most-significant. |
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1457 }; | 1458 }; |
1458 | 1459 |
1459 void nop(NopMarkerTypes n) { | 1460 void nop(NopMarkerTypes n) { |
1460 ASSERT((FIRST_NOP_MARKER <= n) && (n <= LAST_NOP_MARKER)); | 1461 ASSERT((FIRST_NOP_MARKER <= n) && (n <= LAST_NOP_MARKER)); |
1461 mov(Register::XRegFromCode(n), Register::XRegFromCode(n)); | 1462 mov(Register::XRegFromCode(n), Register::XRegFromCode(n)); |
1462 } | 1463 } |
1463 | 1464 |
1464 // FP instructions. | 1465 // FP instructions. |
1465 // Move immediate to FP register. | 1466 // Move immediate to FP register. |
1466 void fmov(FPRegister fd, double imm); | 1467 void fmov(FPRegister fd, double imm); |
| 1468 void fmov(FPRegister fd, float imm); |
1467 | 1469 |
1468 // Move FP register to register. | 1470 // Move FP register to register. |
1469 void fmov(Register rd, FPRegister fn); | 1471 void fmov(Register rd, FPRegister fn); |
1470 | 1472 |
1471 // Move register to FP register. | 1473 // Move register to FP register. |
1472 void fmov(FPRegister fd, Register rn); | 1474 void fmov(FPRegister fd, Register rn); |
1473 | 1475 |
1474 // Move FP register to FP register. | 1476 // Move FP register to FP register. |
1475 void fmov(FPRegister fd, FPRegister fn); | 1477 void fmov(FPRegister fd, FPRegister fn); |
1476 | 1478 |
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2168 class EnsureSpace BASE_EMBEDDED { | 2170 class EnsureSpace BASE_EMBEDDED { |
2169 public: | 2171 public: |
2170 explicit EnsureSpace(Assembler* assembler) { | 2172 explicit EnsureSpace(Assembler* assembler) { |
2171 assembler->CheckBuffer(); | 2173 assembler->CheckBuffer(); |
2172 } | 2174 } |
2173 }; | 2175 }; |
2174 | 2176 |
2175 } } // namespace v8::internal | 2177 } } // namespace v8::internal |
2176 | 2178 |
2177 #endif // V8_A64_ASSEMBLER_A64_H_ | 2179 #endif // V8_A64_ASSEMBLER_A64_H_ |
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