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Issue 1945783002: [turbofan] ARM64: Use zr to store immediate zero (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Remove superfluous DCHECK clause Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 2232 matching lines...) Expand 10 before | Expand all | Expand 10 after
2243 ASSERT_EQ(1U, s.size()); 2243 ASSERT_EQ(1U, s.size());
2244 EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode()); 2244 EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode());
2245 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode()); 2245 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
2246 ASSERT_EQ(3U, s[0]->InputCount()); 2246 ASSERT_EQ(3U, s[0]->InputCount());
2247 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind()); 2247 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
2248 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1))); 2248 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
2249 EXPECT_EQ(0U, s[0]->OutputCount()); 2249 EXPECT_EQ(0U, s[0]->OutputCount());
2250 } 2250 }
2251 } 2251 }
2252 2252
2253 TEST_P(InstructionSelectorMemoryAccessTest, StoreZero) {
2254 const MemoryAccess memacc = GetParam();
2255 TRACED_FOREACH(int32_t, index, memacc.immediates) {
2256 StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer());
2257 m.Store(memacc.type.representation(), m.Parameter(0),
2258 m.Int32Constant(index), m.Int32Constant(0), kNoWriteBarrier);
2259 m.Return(m.Int32Constant(0));
2260 Stream s = m.Build();
2261 ASSERT_EQ(1U, s.size());
2262 EXPECT_EQ(memacc.str_opcode, s[0]->arch_opcode());
2263 EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
2264 ASSERT_EQ(3U, s[0]->InputCount());
2265 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
2266 EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
2267 ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(2)->kind());
2268 EXPECT_EQ(0, s.ToInt64(s[0]->InputAt(2)));
2269 EXPECT_EQ(0U, s[0]->OutputCount());
2270 }
2271 }
2253 2272
2254 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, 2273 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
2255 InstructionSelectorMemoryAccessTest, 2274 InstructionSelectorMemoryAccessTest,
2256 ::testing::ValuesIn(kMemoryAccesses)); 2275 ::testing::ValuesIn(kMemoryAccesses));
2257 2276
2258 2277
2259 // ----------------------------------------------------------------------------- 2278 // -----------------------------------------------------------------------------
2260 // Comparison instructions. 2279 // Comparison instructions.
2261 2280
2262 static const MachInst2 kComparisonInstructions[] = { 2281 static const MachInst2 kComparisonInstructions[] = {
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3340 ASSERT_EQ(2U, s[0]->InputCount()); 3359 ASSERT_EQ(2U, s[0]->InputCount());
3341 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 3360 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
3342 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1))); 3361 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
3343 ASSERT_EQ(1U, s[0]->OutputCount()); 3362 ASSERT_EQ(1U, s[0]->OutputCount());
3344 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 3363 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
3345 } 3364 }
3346 3365
3347 } // namespace compiler 3366 } // namespace compiler
3348 } // namespace internal 3367 } // namespace internal
3349 } // namespace v8 3368 } // namespace v8
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