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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/arm64/frames-arm64.h" | 7 #include "src/arm64/frames-arm64.h" |
8 #include "src/arm64/macro-assembler-arm64.h" | 8 #include "src/arm64/macro-assembler-arm64.h" |
9 #include "src/ast/scopes.h" | 9 #include "src/ast/scopes.h" |
10 #include "src/compiler/code-generator-impl.h" | 10 #include "src/compiler/code-generator-impl.h" |
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26 : InstructionOperandConverter(gen, instr) {} | 26 : InstructionOperandConverter(gen, instr) {} |
27 | 27 |
28 DoubleRegister InputFloat32Register(size_t index) { | 28 DoubleRegister InputFloat32Register(size_t index) { |
29 return InputDoubleRegister(index).S(); | 29 return InputDoubleRegister(index).S(); |
30 } | 30 } |
31 | 31 |
32 DoubleRegister InputFloat64Register(size_t index) { | 32 DoubleRegister InputFloat64Register(size_t index) { |
33 return InputDoubleRegister(index); | 33 return InputDoubleRegister(index); |
34 } | 34 } |
35 | 35 |
| 36 CPURegister InputFloat32OrZeroRegister(size_t index) { |
| 37 if (instr_->InputAt(index)->IsImmediate()) { |
| 38 DCHECK(bit_cast<int32_t>(InputFloat32(index)) == 0); |
| 39 return wzr; |
| 40 } |
| 41 DCHECK(instr_->InputAt(index)->IsDoubleRegister()); |
| 42 return InputDoubleRegister(index).S(); |
| 43 } |
| 44 |
| 45 CPURegister InputFloat64OrZeroRegister(size_t index) { |
| 46 if (instr_->InputAt(index)->IsImmediate()) { |
| 47 DCHECK(bit_cast<int64_t>(InputDouble(index)) == 0); |
| 48 return xzr; |
| 49 } |
| 50 DCHECK(instr_->InputAt(index)->IsDoubleRegister()); |
| 51 return InputDoubleRegister(index); |
| 52 } |
| 53 |
36 size_t OutputCount() { return instr_->OutputCount(); } | 54 size_t OutputCount() { return instr_->OutputCount(); } |
37 | 55 |
38 DoubleRegister OutputFloat32Register() { return OutputDoubleRegister().S(); } | 56 DoubleRegister OutputFloat32Register() { return OutputDoubleRegister().S(); } |
39 | 57 |
40 DoubleRegister OutputFloat64Register() { return OutputDoubleRegister(); } | 58 DoubleRegister OutputFloat64Register() { return OutputDoubleRegister(); } |
41 | 59 |
42 Register InputRegister32(size_t index) { | 60 Register InputRegister32(size_t index) { |
43 return ToRegister(instr_->InputAt(index)).W(); | 61 return ToRegister(instr_->InputAt(index)).W(); |
44 } | 62 } |
45 | 63 |
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409 auto buffer = i.InputRegister(0); \ | 427 auto buffer = i.InputRegister(0); \ |
410 auto offset = i.InputRegister32(1); \ | 428 auto offset = i.InputRegister32(1); \ |
411 auto length = i.InputOperand32(2); \ | 429 auto length = i.InputOperand32(2); \ |
412 __ Cmp(offset, length); \ | 430 __ Cmp(offset, length); \ |
413 auto ool = new (zone()) OutOfLineLoadZero(this, result); \ | 431 auto ool = new (zone()) OutOfLineLoadZero(this, result); \ |
414 __ B(hs, ool->entry()); \ | 432 __ B(hs, ool->entry()); \ |
415 __ asm_instr(result, MemOperand(buffer, offset, UXTW)); \ | 433 __ asm_instr(result, MemOperand(buffer, offset, UXTW)); \ |
416 __ Bind(ool->exit()); \ | 434 __ Bind(ool->exit()); \ |
417 } while (0) | 435 } while (0) |
418 | 436 |
419 | 437 #define ASSEMBLE_CHECKED_STORE_FLOAT(width) \ |
420 #define ASSEMBLE_CHECKED_STORE_FLOAT(width) \ | 438 do { \ |
421 do { \ | 439 auto buffer = i.InputRegister(0); \ |
422 auto buffer = i.InputRegister(0); \ | 440 auto offset = i.InputRegister32(1); \ |
423 auto offset = i.InputRegister32(1); \ | 441 auto length = i.InputOperand32(2); \ |
424 auto length = i.InputOperand32(2); \ | 442 auto value = i.InputFloat##width##OrZeroRegister(3); \ |
425 auto value = i.InputFloat##width##Register(3); \ | 443 __ Cmp(offset, length); \ |
426 __ Cmp(offset, length); \ | 444 Label done; \ |
427 Label done; \ | 445 __ B(hs, &done); \ |
428 __ B(hs, &done); \ | 446 __ Str(value, MemOperand(buffer, offset, UXTW)); \ |
429 __ Str(value, MemOperand(buffer, offset, UXTW)); \ | 447 __ Bind(&done); \ |
430 __ Bind(&done); \ | |
431 } while (0) | 448 } while (0) |
432 | 449 |
433 | |
434 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ | 450 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ |
435 do { \ | 451 do { \ |
436 auto buffer = i.InputRegister(0); \ | 452 auto buffer = i.InputRegister(0); \ |
437 auto offset = i.InputRegister32(1); \ | 453 auto offset = i.InputRegister32(1); \ |
438 auto length = i.InputOperand32(2); \ | 454 auto length = i.InputOperand32(2); \ |
439 auto value = i.InputRegister32(3); \ | 455 auto value = i.InputOrZeroRegister32(3); \ |
440 __ Cmp(offset, length); \ | 456 __ Cmp(offset, length); \ |
441 Label done; \ | 457 Label done; \ |
442 __ B(hs, &done); \ | 458 __ B(hs, &done); \ |
443 __ asm_instr(value, MemOperand(buffer, offset, UXTW)); \ | 459 __ asm_instr(value, MemOperand(buffer, offset, UXTW)); \ |
444 __ Bind(&done); \ | 460 __ Bind(&done); \ |
445 } while (0) | 461 } while (0) |
446 | 462 |
447 | |
448 #define ASSEMBLE_CHECKED_STORE_INTEGER_64(asm_instr) \ | 463 #define ASSEMBLE_CHECKED_STORE_INTEGER_64(asm_instr) \ |
449 do { \ | 464 do { \ |
450 auto buffer = i.InputRegister(0); \ | 465 auto buffer = i.InputRegister(0); \ |
451 auto offset = i.InputRegister32(1); \ | 466 auto offset = i.InputRegister32(1); \ |
452 auto length = i.InputOperand32(2); \ | 467 auto length = i.InputOperand32(2); \ |
453 auto value = i.InputRegister(3); \ | 468 auto value = i.InputOrZeroRegister64(3); \ |
454 __ Cmp(offset, length); \ | 469 __ Cmp(offset, length); \ |
455 Label done; \ | 470 Label done; \ |
456 __ B(hs, &done); \ | 471 __ B(hs, &done); \ |
457 __ asm_instr(value, MemOperand(buffer, offset, UXTW)); \ | 472 __ asm_instr(value, MemOperand(buffer, offset, UXTW)); \ |
458 __ Bind(&done); \ | 473 __ Bind(&done); \ |
459 } while (0) | 474 } while (0) |
460 | 475 |
461 | |
462 #define ASSEMBLE_SHIFT(asm_instr, width) \ | 476 #define ASSEMBLE_SHIFT(asm_instr, width) \ |
463 do { \ | 477 do { \ |
464 if (instr->InputAt(1)->IsRegister()) { \ | 478 if (instr->InputAt(1)->IsRegister()) { \ |
465 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \ | 479 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \ |
466 i.InputRegister##width(1)); \ | 480 i.InputRegister##width(1)); \ |
467 } else { \ | 481 } else { \ |
468 uint32_t imm = \ | 482 uint32_t imm = \ |
469 static_cast<uint32_t>(i.InputOperand##width(1).ImmediateValue()); \ | 483 static_cast<uint32_t>(i.InputOperand##width(1).ImmediateValue()); \ |
470 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \ | 484 __ asm_instr(i.OutputRegister##width(), i.InputRegister##width(0), \ |
471 imm % (width)); \ | 485 imm % (width)); \ |
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1330 case kArm64U64MoveFloat64: | 1344 case kArm64U64MoveFloat64: |
1331 __ Fmov(i.OutputRegister(), i.InputDoubleRegister(0)); | 1345 __ Fmov(i.OutputRegister(), i.InputDoubleRegister(0)); |
1332 break; | 1346 break; |
1333 case kArm64Ldrb: | 1347 case kArm64Ldrb: |
1334 __ Ldrb(i.OutputRegister(), i.MemoryOperand()); | 1348 __ Ldrb(i.OutputRegister(), i.MemoryOperand()); |
1335 break; | 1349 break; |
1336 case kArm64Ldrsb: | 1350 case kArm64Ldrsb: |
1337 __ Ldrsb(i.OutputRegister(), i.MemoryOperand()); | 1351 __ Ldrsb(i.OutputRegister(), i.MemoryOperand()); |
1338 break; | 1352 break; |
1339 case kArm64Strb: | 1353 case kArm64Strb: |
1340 __ Strb(i.InputRegister(2), i.MemoryOperand()); | 1354 __ Strb(i.InputOrZeroRegister64(2), i.MemoryOperand()); |
1341 break; | 1355 break; |
1342 case kArm64Ldrh: | 1356 case kArm64Ldrh: |
1343 __ Ldrh(i.OutputRegister(), i.MemoryOperand()); | 1357 __ Ldrh(i.OutputRegister(), i.MemoryOperand()); |
1344 break; | 1358 break; |
1345 case kArm64Ldrsh: | 1359 case kArm64Ldrsh: |
1346 __ Ldrsh(i.OutputRegister(), i.MemoryOperand()); | 1360 __ Ldrsh(i.OutputRegister(), i.MemoryOperand()); |
1347 break; | 1361 break; |
1348 case kArm64Strh: | 1362 case kArm64Strh: |
1349 __ Strh(i.InputRegister(2), i.MemoryOperand()); | 1363 __ Strh(i.InputOrZeroRegister64(2), i.MemoryOperand()); |
1350 break; | 1364 break; |
1351 case kArm64LdrW: | 1365 case kArm64LdrW: |
1352 __ Ldr(i.OutputRegister32(), i.MemoryOperand()); | 1366 __ Ldr(i.OutputRegister32(), i.MemoryOperand()); |
1353 break; | 1367 break; |
1354 case kArm64StrW: | 1368 case kArm64StrW: |
1355 __ Str(i.InputRegister32(2), i.MemoryOperand()); | 1369 __ Str(i.InputOrZeroRegister32(2), i.MemoryOperand()); |
1356 break; | 1370 break; |
1357 case kArm64Ldr: | 1371 case kArm64Ldr: |
1358 __ Ldr(i.OutputRegister(), i.MemoryOperand()); | 1372 __ Ldr(i.OutputRegister(), i.MemoryOperand()); |
1359 break; | 1373 break; |
1360 case kArm64Str: | 1374 case kArm64Str: |
1361 __ Str(i.InputRegister(2), i.MemoryOperand()); | 1375 __ Str(i.InputOrZeroRegister64(2), i.MemoryOperand()); |
1362 break; | 1376 break; |
1363 case kArm64LdrS: | 1377 case kArm64LdrS: |
1364 __ Ldr(i.OutputDoubleRegister().S(), i.MemoryOperand()); | 1378 __ Ldr(i.OutputDoubleRegister().S(), i.MemoryOperand()); |
1365 break; | 1379 break; |
1366 case kArm64StrS: | 1380 case kArm64StrS: |
1367 __ Str(i.InputDoubleRegister(2).S(), i.MemoryOperand()); | 1381 __ Str(i.InputFloat32OrZeroRegister(2), i.MemoryOperand()); |
1368 break; | 1382 break; |
1369 case kArm64LdrD: | 1383 case kArm64LdrD: |
1370 __ Ldr(i.OutputDoubleRegister(), i.MemoryOperand()); | 1384 __ Ldr(i.OutputDoubleRegister(), i.MemoryOperand()); |
1371 break; | 1385 break; |
1372 case kArm64StrD: | 1386 case kArm64StrD: |
1373 __ Str(i.InputDoubleRegister(2), i.MemoryOperand()); | 1387 __ Str(i.InputFloat64OrZeroRegister(2), i.MemoryOperand()); |
1374 break; | 1388 break; |
1375 case kCheckedLoadInt8: | 1389 case kCheckedLoadInt8: |
1376 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsb); | 1390 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsb); |
1377 break; | 1391 break; |
1378 case kCheckedLoadUint8: | 1392 case kCheckedLoadUint8: |
1379 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrb); | 1393 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrb); |
1380 break; | 1394 break; |
1381 case kCheckedLoadInt16: | 1395 case kCheckedLoadInt16: |
1382 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsh); | 1396 ASSEMBLE_CHECKED_LOAD_INTEGER(Ldrsh); |
1383 break; | 1397 break; |
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1857 padding_size -= kInstructionSize; | 1871 padding_size -= kInstructionSize; |
1858 } | 1872 } |
1859 } | 1873 } |
1860 } | 1874 } |
1861 | 1875 |
1862 #undef __ | 1876 #undef __ |
1863 | 1877 |
1864 } // namespace compiler | 1878 } // namespace compiler |
1865 } // namespace internal | 1879 } // namespace internal |
1866 } // namespace v8 | 1880 } // namespace v8 |
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