A64: Rename k<Y>RegSize to k<Y>RegSizeInBits, and k<Y>RegSizeInBytes to k<Y>RegSize.

src/a64/macro-assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 325 matching lines @@
     }
     imm >>= 16;
   }
   return count;
 }
 
 
 // The movz instruction can generate immediates containing an arbitrary 16-bit
 // half-word, with remaining bits clear, eg. 0x00001234, 0x0000123400000000.
 bool MacroAssembler::IsImmMovz(uint64_t imm, unsigned reg_size) {
-  ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize));
+  ASSERT((reg_size == kXRegSizeInBits) || (reg_size == kWRegSizeInBits));
   return CountClearHalfWords(imm, reg_size) >= ((reg_size / 16) - 1);
 }
 
 
 // The movn instruction can generate immediates containing an arbitrary 16-bit
 // half-word, with remaining bits set, eg. 0xffff1234, 0xffff1234ffffffff.
 bool MacroAssembler::IsImmMovn(uint64_t imm, unsigned reg_size) {
   return IsImmMovz(~imm, reg_size);
 }
 
@@ skipping 110 matching lines @@
              (operand.IsShiftedRegister() && (operand.shift() == ROR))) {
     // Add/sub with carry (immediate or ROR shifted register.)
     Register temp = temps.AcquireSameSizeAs(rn);
     Mov(temp, operand);
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else if (operand.IsShiftedRegister() && (operand.shift_amount() != 0)) {
     // Add/sub with carry (shifted register).
     ASSERT(operand.reg().SizeInBits() == rd.SizeInBits());
     ASSERT(operand.shift() != ROR);
-    ASSERT(
-        is_uintn(operand.shift_amount(),
-                 rd.SizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2));
+    ASSERT(is_uintn(operand.shift_amount(),
+          rd.SizeInBits() == kXRegSizeInBits ? kXRegSizeInBitsLog2
+                                             : kWRegSizeInBitsLog2));
     Register temp = temps.AcquireSameSizeAs(rn);
     EmitShift(temp, operand.reg(), operand.shift(), operand.shift_amount());
     AddSubWithCarry(rd, rn, temp, S, op);
 
   } else if (operand.IsExtendedRegister()) {
     // Add/sub with carry (extended register).
     ASSERT(operand.reg().SizeInBits() <= rd.SizeInBits());
     // Add/sub extended supports a shift <= 4. We want to support exactly the
     // same modes.
     ASSERT(operand.shift_amount() <= 4);
@@ skipping 621 matching lines @@
 
 
 void MacroAssembler::PushCalleeSavedRegisters() {
   // Ensure that the macro-assembler doesn't use any scratch registers.
   InstructionAccurateScope scope(this);
 
   // This method must not be called unless the current stack pointer is the
   // system stack pointer (csp).
   ASSERT(csp.Is(StackPointer()));
 
-  MemOperand tos(csp, -2 * kXRegSizeInBytes, PreIndex);
+  MemOperand tos(csp, -2 * kXRegSize, PreIndex);
 
   stp(d14, d15, tos);
   stp(d12, d13, tos);
   stp(d10, d11, tos);
   stp(d8, d9, tos);
 
   stp(x29, x30, tos);
   stp(x27, x28, tos);    // x28 = jssp
   stp(x25, x26, tos);
   stp(x23, x24, tos);
   stp(x21, x22, tos);
   stp(x19, x20, tos);
 }
 
 
 void MacroAssembler::PopCalleeSavedRegisters() {
   // Ensure that the macro-assembler doesn't use any scratch registers.
   InstructionAccurateScope scope(this);
 
   // This method must not be called unless the current stack pointer is the
   // system stack pointer (csp).
   ASSERT(csp.Is(StackPointer()));
 
-  MemOperand tos(csp, 2 * kXRegSizeInBytes, PostIndex);
+  MemOperand tos(csp, 2 * kXRegSize, PostIndex);
 
   ldp(x19, x20, tos);
   ldp(x21, x22, tos);
   ldp(x23, x24, tos);
   ldp(x25, x26, tos);
   ldp(x27, x28, tos);    // x28 = jssp
   ldp(x29, x30, tos);
 
   ldp(d8, d9, tos);
   ldp(d10, d11, tos);
@@ skipping 463 matching lines @@
   Mov(x3, Operand(thunk_ref));
   B(&end_profiler_check);
 
   Bind(&profiler_disabled);
   Mov(x3, function_address);
   Bind(&end_profiler_check);
 
   // Save the callee-save registers we are going to use.
   // TODO(all): Is this necessary? ARM doesn't do it.
   STATIC_ASSERT(kCallApiFunctionSpillSpace == 4);
-  Poke(x19, (spill_offset + 0) * kXRegSizeInBytes);
-  Poke(x20, (spill_offset + 1) * kXRegSizeInBytes);
-  Poke(x21, (spill_offset + 2) * kXRegSizeInBytes);
-  Poke(x22, (spill_offset + 3) * kXRegSizeInBytes);
+  Poke(x19, (spill_offset + 0) * kXRegSize);
+  Poke(x20, (spill_offset + 1) * kXRegSize);
+  Poke(x21, (spill_offset + 2) * kXRegSize);
+  Poke(x22, (spill_offset + 3) * kXRegSize);
 
   // Allocate HandleScope in callee-save registers.
   // We will need to restore the HandleScope after the call to the API function,
   // by allocating it in callee-save registers they will be preserved by C code.
   Register handle_scope_base = x22;
   Register next_address_reg = x19;
   Register limit_reg = x20;
   Register level_reg = w21;
 
   Mov(handle_scope_base, Operand(next_address));
@@ skipping 43 matching lines @@
     Check(eq, kUnexpectedLevelAfterReturnFromApiCall);
   }
   Sub(level_reg, level_reg, 1);
   Str(level_reg, MemOperand(handle_scope_base, kLevelOffset));
   Ldr(x1, MemOperand(handle_scope_base, kLimitOffset));
   Cmp(limit_reg, x1);
   B(ne, &delete_allocated_handles);
 
   Bind(&leave_exit_frame);
   // Restore callee-saved registers.
-  Peek(x19, (spill_offset + 0) * kXRegSizeInBytes);
-  Peek(x20, (spill_offset + 1) * kXRegSizeInBytes);
-  Peek(x21, (spill_offset + 2) * kXRegSizeInBytes);
-  Peek(x22, (spill_offset + 3) * kXRegSizeInBytes);
+  Peek(x19, (spill_offset + 0) * kXRegSize);
+  Peek(x20, (spill_offset + 1) * kXRegSize);
+  Peek(x21, (spill_offset + 2) * kXRegSize);
+  Peek(x22, (spill_offset + 3) * kXRegSize);
 
   // Check if the function scheduled an exception.
   Mov(x5, Operand(ExternalReference::scheduled_exception_address(isolate())));
   Ldr(x5, MemOperand(x5));
   JumpIfNotRoot(x5, Heap::kTheHoleValueRootIndex, &promote_scheduled_exception);
   Bind(&exception_handled);
 
   bool restore_context = context_restore_operand != NULL;
   if (restore_context) {
     Ldr(cp, *context_restore_operand);
@@ skipping 450 matching lines @@
   // number string cache for smis is just the smi value, and the hash for
   // doubles is the xor of the upper and lower words. See
   // Heap::GetNumberStringCache.
   Label is_smi;
   Label load_result_from_cache;
 
   JumpIfSmi(object, &is_smi);
   CheckMap(object, scratch1, Heap::kHeapNumberMapRootIndex, not_found,
            DONT_DO_SMI_CHECK);
 
-  STATIC_ASSERT(kDoubleSize == (kWRegSizeInBytes * 2));
+  STATIC_ASSERT(kDoubleSize == (kWRegSize * 2));
   Add(scratch1, object, HeapNumber::kValueOffset - kHeapObjectTag);
   Ldp(scratch1.W(), scratch2.W(), MemOperand(scratch1));
   Eor(scratch1, scratch1, scratch2);
   And(scratch1, scratch1, mask);
 
   // Calculate address of entry in string cache: each entry consists of two
   // pointer sized fields.
   Add(scratch1, number_string_cache,
       Operand(scratch1, LSL, kPointerSizeLog2 + 1));
 
@@ skipping 112 matching lines @@
 
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
   Sub(dst_untagged, dst, kHeapObjectTag);
   Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   Label loop;
   Bind(&loop);
   Ldp(scratch4, scratch5,
-      MemOperand(src_untagged, kXRegSizeInBytes * 2, PostIndex));
+      MemOperand(src_untagged, kXRegSize* 2, PostIndex));
   Stp(scratch4, scratch5,
-      MemOperand(dst_untagged, kXRegSizeInBytes * 2, PostIndex));
+      MemOperand(dst_untagged, kXRegSize* 2, PostIndex));
   Sub(remaining, remaining, 1);
   Cbnz(remaining, &loop);
 
   // Handle the leftovers.
   if (count & 1) {
     Ldr(scratch4, MemOperand(src_untagged));
     Str(scratch4, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledPairsHelper(Register dst,
                                                    Register src,
                                                    unsigned count,
                                                    Register scratch1,
                                                    Register scratch2,
                                                    Register scratch3,
                                                    Register scratch4) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
   ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3, scratch4));
 
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
   sub(dst_untagged, dst, kHeapObjectTag);
   sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields in pairs.
   for (unsigned i = 0; i < count / 2; i++) {
-    Ldp(scratch3, scratch4,
-        MemOperand(src_untagged, kXRegSizeInBytes * 2, PostIndex));
-    Stp(scratch3, scratch4,
-        MemOperand(dst_untagged, kXRegSizeInBytes * 2, PostIndex));
+    Ldp(scratch3, scratch4, MemOperand(src_untagged, kXRegSize * 2, PostIndex));
+    Stp(scratch3, scratch4, MemOperand(dst_untagged, kXRegSize * 2, PostIndex));
   }
 
   // Handle the leftovers.
   if (count & 1) {
     Ldr(scratch3, MemOperand(src_untagged));
     Str(scratch3, MemOperand(dst_untagged));
   }
 }
 
 
 void MacroAssembler::CopyFieldsUnrolledHelper(Register dst,
                                               Register src,
                                               unsigned count,
                                               Register scratch1,
                                               Register scratch2,
                                               Register scratch3) {
   // Untag src and dst into scratch registers.
   // Copy src->dst in an unrolled loop.
   ASSERT(!AreAliased(dst, src, scratch1, scratch2, scratch3));
 
   const Register& dst_untagged = scratch1;
   const Register& src_untagged = scratch2;
   Sub(dst_untagged, dst, kHeapObjectTag);
   Sub(src_untagged, src, kHeapObjectTag);
 
   // Copy fields one by one.
   for (unsigned i = 0; i < count; i++) {
-    Ldr(scratch3, MemOperand(src_untagged, kXRegSizeInBytes, PostIndex));
-    Str(scratch3, MemOperand(dst_untagged, kXRegSizeInBytes, PostIndex));
+    Ldr(scratch3, MemOperand(src_untagged, kXRegSize, PostIndex));
+    Str(scratch3, MemOperand(dst_untagged, kXRegSize, PostIndex));
   }
 }
 
 
 void MacroAssembler::CopyFields(Register dst, Register src, CPURegList temps,
                                 unsigned count) {
   // One of two methods is used:
   //
   // For high 'count' values where many scratch registers are available:
   //    Untag src and dst into scratch registers.
@@ skipping 526 matching lines @@
 void MacroAssembler::ExitFrameRestoreFPRegs() {
   // Read the registers from the stack without popping them. The stack pointer
   // will be reset as part of the unwinding process.
   CPURegList saved_fp_regs = kCallerSavedFP;
   ASSERT(saved_fp_regs.Count() % 2 == 0);
 
   int offset = ExitFrameConstants::kLastExitFrameField;
   while (!saved_fp_regs.IsEmpty()) {
     const CPURegister& dst0 = saved_fp_regs.PopHighestIndex();
     const CPURegister& dst1 = saved_fp_regs.PopHighestIndex();
-    offset -= 2 * kDRegSizeInBytes;
+    offset -= 2 * kDRegSize;
     Ldp(dst1, dst0, MemOperand(fp, offset));
   }
 }
 
 
 // TODO(jbramley): Check that we're handling the frame pointer correctly.
 void MacroAssembler::EnterExitFrame(bool save_doubles,
                                     const Register& scratch,
                                     int extra_space) {
   ASSERT(jssp.Is(StackPointer()));
@@ skipping 24 matching lines @@
 
   STATIC_ASSERT((-2 * kPointerSize) ==
                 ExitFrameConstants::kLastExitFrameField);
   if (save_doubles) {
     ExitFramePreserveFPRegs();
   }
 
   // Reserve space for the return address and for user requested memory.
   // We do this before aligning to make sure that we end up correctly
   // aligned with the minimum of wasted space.
-  Claim(extra_space + 1, kXRegSizeInBytes);
+  Claim(extra_space + 1, kXRegSize);
   //         fp[8]: CallerPC (lr)
   //   fp -> fp[0]: CallerFP (old fp)
   //         fp[-8]: Space reserved for SPOffset.
   //         fp[-16]: CodeObject()
   //         jssp[-16 - fp_size]: Saved doubles (if save_doubles is true).
   //         jssp[8]: Extra space reserved for caller (if extra_space != 0).
   // jssp -> jssp[0]: Space reserved for the return address.
 
   // Align and synchronize the system stack pointer with jssp.
   AlignAndSetCSPForFrame();
   ASSERT(csp.Is(StackPointer()));
 
   //         fp[8]: CallerPC (lr)
   //   fp -> fp[0]: CallerFP (old fp)
   //         fp[-8]: Space reserved for SPOffset.
   //         fp[-16]: CodeObject()
   //         csp[...]: Saved doubles, if saved_doubles is true.
   //         csp[8]: Memory reserved for the caller if extra_space != 0.
   //                 Alignment padding, if necessary.
   //  csp -> csp[0]: Space reserved for the return address.
 
   // ExitFrame::GetStateForFramePointer expects to find the return address at
   // the memory address immediately below the pointer stored in SPOffset.
   // It is not safe to derive much else from SPOffset, because the size of the
   // padding can vary.
-  Add(scratch, csp, kXRegSizeInBytes);
+  Add(scratch, csp, kXRegSize);
   Str(scratch, MemOperand(fp, ExitFrameConstants::kSPOffset));
 }
 
 
 // Leave the current exit frame.
 void MacroAssembler::LeaveExitFrame(bool restore_doubles,
                                     const Register& scratch,
                                     bool restore_context) {
   ASSERT(csp.Is(StackPointer()));
 
@@ skipping 121 matching lines @@
   Push(x10);
   // Set this new handler as the current one.
   Str(jssp, MemOperand(x11));
 }
 
 
 void MacroAssembler::PopTryHandler() {
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   Pop(x10);
   Mov(x11, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
-  Drop(StackHandlerConstants::kSize - kXRegSizeInBytes, kByteSizeInBytes);
+  Drop(StackHandlerConstants::kSize - kXRegSize, kByteSizeInBytes);
   Str(x10, MemOperand(x11));
 }
 
 
 void MacroAssembler::Allocate(int object_size,
                               Register result,
                               Register scratch1,
                               Register scratch2,
                               Label* gc_required,
                               AllocationFlags flags) {
@@ skipping 968 matching lines @@
   // Safepoints expect a block of kNumSafepointRegisters values on the stack, so
   // adjust the stack for unsaved registers.
   const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
   ASSERT(num_unsaved >= 0);
   Claim(num_unsaved);
   PushXRegList(kSafepointSavedRegisters);
 }
 
 
 void MacroAssembler::PushSafepointFPRegisters() {
-  PushCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSize,
+  PushCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSizeInBits,
                             FPRegister::kAllocatableFPRegisters));
 }
 
 
 void MacroAssembler::PopSafepointFPRegisters() {
-  PopCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSize,
+  PopCPURegList(CPURegList(CPURegister::kFPRegister, kDRegSizeInBits,
                            FPRegister::kAllocatableFPRegisters));
 }
 
 
 int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
   // Make sure the safepoint registers list is what we expect.
   ASSERT(CPURegList::GetSafepointSavedRegisters().list() == 0x6ffcffff);
 
   // Safepoint registers are stored contiguously on the stack, but not all the
   // registers are saved. The following registers are excluded:
@@ skipping 812 matching lines @@
 
 
 void MacroAssembler::EmitFrameSetupForCodeAgePatching(Assembler * assm) {
   Label start;
   __ bind(&start);
 
   // We can do this sequence using four instructions, but the code ageing
   // sequence that patches it needs five, so we use the extra space to try to
   // simplify some addressing modes and remove some dependencies (compared to
   // using two stp instructions with write-back).
-  __ sub(jssp, jssp, 4 * kXRegSizeInBytes);
-  __ sub(csp, csp, 4 * kXRegSizeInBytes);
-  __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSizeInBytes));
-  __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSizeInBytes));
+  __ sub(jssp, jssp, 4 * kXRegSize);
+  __ sub(csp, csp, 4 * kXRegSize);
+  __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSize));
+  __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSize));
   __ add(fp, jssp, StandardFrameConstants::kFixedFrameSizeFromFp);
 
   __ AssertSizeOfCodeGeneratedSince(&start, kCodeAgeSequenceSize);
 }
 
 
 void MacroAssembler::EmitCodeAgeSequence(Assembler * assm,
                                          Code * stub) {
   Label start;
   __ bind(&start);
@@ skipping 143 matching lines @@
   }
 }
 
 
 #undef __
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64