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| 1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. | 
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be | 
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. | 
| 4 | 4 | 
| 5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" | 
| 6 | 6 | 
| 7 #include "src/ast/scopes.h" | 7 #include "src/ast/scopes.h" | 
| 8 #include "src/compiler/code-generator-impl.h" | 8 #include "src/compiler/code-generator-impl.h" | 
| 9 #include "src/compiler/gap-resolver.h" | 9 #include "src/compiler/gap-resolver.h" | 
| 10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" | 
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| 801       break; | 801       break; | 
| 802     case kS390_OrComplement: | 802     case kS390_OrComplement: | 
| 803       __ NotP(i.InputRegister(1)); | 803       __ NotP(i.InputRegister(1)); | 
| 804       __ OrP(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); | 804       __ OrP(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); | 
| 805       break; | 805       break; | 
| 806     case kS390_Xor: | 806     case kS390_Xor: | 
| 807       ASSEMBLE_BINOP(XorP, XorP); | 807       ASSEMBLE_BINOP(XorP, XorP); | 
| 808       break; | 808       break; | 
| 809     case kS390_ShiftLeft32: | 809     case kS390_ShiftLeft32: | 
| 810       if (HasRegisterInput(instr, 1)) { | 810       if (HasRegisterInput(instr, 1)) { | 
| 811         if (i.OutputRegister().is(i.InputRegister(1))) { | 811         if (i.OutputRegister().is(i.InputRegister(1)) && | 
|  | 812             !CpuFeatures::IsSupported(DISTINCT_OPS)) { | 
| 812           __ LoadRR(kScratchReg, i.InputRegister(1)); | 813           __ LoadRR(kScratchReg, i.InputRegister(1)); | 
| 813           __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg); | 814           __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg); | 
| 814         } else { | 815         } else { | 
| 815           ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); | 816           ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); | 
| 816         } | 817         } | 
| 817       } else { | 818       } else { | 
| 818         ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); | 819         ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); | 
| 819       } | 820       } | 
| 820 #if V8_TARGET_ARCH_S390X | 821       __ LoadlW(i.OutputRegister(0), i.OutputRegister(0)); | 
| 821       __ lgfr(i.OutputRegister(0), i.OutputRegister(0)); |  | 
| 822 #endif |  | 
| 823       break; | 822       break; | 
| 824 #if V8_TARGET_ARCH_S390X | 823 #if V8_TARGET_ARCH_S390X | 
| 825     case kS390_ShiftLeft64: | 824     case kS390_ShiftLeft64: | 
| 826       ASSEMBLE_BINOP(sllg, sllg); | 825       ASSEMBLE_BINOP(sllg, sllg); | 
| 827       break; | 826       break; | 
| 828 #endif | 827 #endif | 
| 829     case kS390_ShiftRight32: | 828     case kS390_ShiftRight32: | 
| 830       if (HasRegisterInput(instr, 1)) { | 829       if (HasRegisterInput(instr, 1)) { | 
| 831         if (i.OutputRegister().is(i.InputRegister(1))) { | 830         if (i.OutputRegister().is(i.InputRegister(1)) && | 
|  | 831             !CpuFeatures::IsSupported(DISTINCT_OPS)) { | 
| 832           __ LoadRR(kScratchReg, i.InputRegister(1)); | 832           __ LoadRR(kScratchReg, i.InputRegister(1)); | 
| 833           __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg); | 833           __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg); | 
| 834         } else { | 834         } else { | 
| 835           ASSEMBLE_BINOP(ShiftRight, ShiftRight); | 835           ASSEMBLE_BINOP(ShiftRight, ShiftRight); | 
| 836         } | 836         } | 
| 837       } else { | 837       } else { | 
| 838         ASSEMBLE_BINOP(ShiftRight, ShiftRight); | 838         ASSEMBLE_BINOP(ShiftRight, ShiftRight); | 
| 839       } | 839       } | 
| 840 #if V8_TARGET_ARCH_S390X | 840       __ LoadlW(i.OutputRegister(0), i.OutputRegister(0)); | 
| 841       __ lgfr(i.OutputRegister(0), i.OutputRegister(0)); |  | 
| 842 #endif |  | 
| 843       break; | 841       break; | 
| 844 #if V8_TARGET_ARCH_S390X | 842 #if V8_TARGET_ARCH_S390X | 
| 845     case kS390_ShiftRight64: | 843     case kS390_ShiftRight64: | 
| 846       ASSEMBLE_BINOP(srlg, srlg); | 844       ASSEMBLE_BINOP(srlg, srlg); | 
| 847       break; | 845       break; | 
| 848 #endif | 846 #endif | 
| 849     case kS390_ShiftRightArith32: | 847     case kS390_ShiftRightArith32: | 
| 850       if (HasRegisterInput(instr, 1)) { | 848       if (HasRegisterInput(instr, 1)) { | 
| 851         if (i.OutputRegister().is(i.InputRegister(1))) { | 849         if (i.OutputRegister().is(i.InputRegister(1)) && | 
|  | 850             !CpuFeatures::IsSupported(DISTINCT_OPS)) { | 
| 852           __ LoadRR(kScratchReg, i.InputRegister(1)); | 851           __ LoadRR(kScratchReg, i.InputRegister(1)); | 
| 853           __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0), | 852           __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0), | 
| 854                              kScratchReg); | 853                              kScratchReg); | 
| 855         } else { | 854         } else { | 
| 856           ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); | 855           ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); | 
| 857         } | 856         } | 
| 858       } else { | 857       } else { | 
| 859         ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); | 858         ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); | 
| 860       } | 859       } | 
|  | 860       __ LoadlW(i.OutputRegister(), i.OutputRegister()); | 
| 861       break; | 861       break; | 
| 862 #if V8_TARGET_ARCH_S390X | 862 #if V8_TARGET_ARCH_S390X | 
| 863     case kS390_ShiftRightArith64: | 863     case kS390_ShiftRightArith64: | 
| 864       ASSEMBLE_BINOP(srag, srag); | 864       ASSEMBLE_BINOP(srag, srag); | 
| 865       break; | 865       break; | 
| 866 #endif | 866 #endif | 
| 867 #if !V8_TARGET_ARCH_S390X | 867 #if !V8_TARGET_ARCH_S390X | 
| 868     case kS390_AddPair: | 868     case kS390_AddPair: | 
| 869       // i.InputRegister(0) ... left low word. | 869       // i.InputRegister(0) ... left low word. | 
| 870       // i.InputRegister(1) ... left high word. | 870       // i.InputRegister(1) ... left high word. | 
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| 1086       break; | 1086       break; | 
| 1087     case kS390_Mul32: | 1087     case kS390_Mul32: | 
| 1088 #if V8_TARGET_ARCH_S390X | 1088 #if V8_TARGET_ARCH_S390X | 
| 1089     case kS390_Mul64: | 1089     case kS390_Mul64: | 
| 1090 #endif | 1090 #endif | 
| 1091       __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); | 1091       __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); | 
| 1092       break; | 1092       break; | 
| 1093     case kS390_MulHigh32: | 1093     case kS390_MulHigh32: | 
| 1094       __ LoadRR(r1, i.InputRegister(0)); | 1094       __ LoadRR(r1, i.InputRegister(0)); | 
| 1095       __ mr_z(r0, i.InputRegister(1)); | 1095       __ mr_z(r0, i.InputRegister(1)); | 
| 1096       __ LoadRR(i.OutputRegister(), r0); | 1096       __ LoadW(i.OutputRegister(), r0); | 
| 1097       break; | 1097       break; | 
| 1098     case kS390_MulHighU32: | 1098     case kS390_MulHighU32: | 
| 1099       __ LoadRR(r1, i.InputRegister(0)); | 1099       __ LoadRR(r1, i.InputRegister(0)); | 
| 1100       __ mlr(r0, i.InputRegister(1)); | 1100       __ mlr(r0, i.InputRegister(1)); | 
| 1101       __ LoadRR(i.OutputRegister(), r0); | 1101       __ LoadlW(i.OutputRegister(), r0); | 
| 1102       break; | 1102       break; | 
| 1103     case kS390_MulFloat: | 1103     case kS390_MulFloat: | 
| 1104       // Ensure we don't clobber right | 1104       // Ensure we don't clobber right | 
| 1105       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { | 1105       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { | 
| 1106         ASSEMBLE_FLOAT_UNOP(meebr); | 1106         ASSEMBLE_FLOAT_UNOP(meebr); | 
| 1107       } else { | 1107       } else { | 
| 1108         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) | 1108         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) | 
| 1109           __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); | 1109           __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); | 
| 1110         __ meebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); | 1110         __ meebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); | 
| 1111       } | 1111       } | 
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| 1124     case kS390_Div64: | 1124     case kS390_Div64: | 
| 1125       __ LoadRR(r1, i.InputRegister(0)); | 1125       __ LoadRR(r1, i.InputRegister(0)); | 
| 1126       __ dsgr(r0, i.InputRegister(1));  // R1: Dividend | 1126       __ dsgr(r0, i.InputRegister(1));  // R1: Dividend | 
| 1127       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 1127       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 
| 1128       break; | 1128       break; | 
| 1129 #endif | 1129 #endif | 
| 1130     case kS390_Div32: | 1130     case kS390_Div32: | 
| 1131       __ LoadRR(r0, i.InputRegister(0)); | 1131       __ LoadRR(r0, i.InputRegister(0)); | 
| 1132       __ srda(r0, Operand(32)); | 1132       __ srda(r0, Operand(32)); | 
| 1133       __ dr(r0, i.InputRegister(1)); | 1133       __ dr(r0, i.InputRegister(1)); | 
| 1134       __ ltr(i.OutputRegister(), r1); | 1134       __ LoadAndTestP_ExtendSrc(i.OutputRegister(), | 
|  | 1135                                 r1);  // Copy R1: Quotient to output | 
| 1135       break; | 1136       break; | 
| 1136 #if V8_TARGET_ARCH_S390X | 1137 #if V8_TARGET_ARCH_S390X | 
| 1137     case kS390_DivU64: | 1138     case kS390_DivU64: | 
| 1138       __ LoadRR(r1, i.InputRegister(0)); | 1139       __ LoadRR(r1, i.InputRegister(0)); | 
| 1139       __ LoadImmP(r0, Operand::Zero()); | 1140       __ LoadImmP(r0, Operand::Zero()); | 
| 1140       __ dlgr(r0, i.InputRegister(1));  // R0:R1: Dividend | 1141       __ dlgr(r0, i.InputRegister(1));  // R0:R1: Dividend | 
| 1141       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 1142       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 
| 1142       break; | 1143       break; | 
| 1143 #endif | 1144 #endif | 
| 1144     case kS390_DivU32: | 1145     case kS390_DivU32: | 
| 1145       __ LoadRR(r0, i.InputRegister(0)); | 1146       __ LoadRR(r0, i.InputRegister(0)); | 
| 1146       __ srdl(r0, Operand(32)); | 1147       __ srdl(r0, Operand(32)); | 
| 1147       __ dlr(r0, i.InputRegister(1));  // R0:R1: Dividend | 1148       __ dlr(r0, i.InputRegister(1));  // R0:R1: Dividend | 
| 1148       __ ltr(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 1149       __ LoadlW(i.OutputRegister(), r1);  // Copy R1: Quotient to output | 
|  | 1150       __ LoadAndTestP_ExtendSrc(r1, r1); | 
| 1149       break; | 1151       break; | 
| 1150 | 1152 | 
| 1151     case kS390_DivFloat: | 1153     case kS390_DivFloat: | 
| 1152       // InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1) | 1154       // InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1) | 
| 1153       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { | 1155       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { | 
| 1154         __ ldr(kScratchDoubleReg, i.InputDoubleRegister(1)); | 1156         __ ldr(kScratchDoubleReg, i.InputDoubleRegister(1)); | 
| 1155         __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); | 1157         __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); | 
| 1156         __ debr(i.OutputDoubleRegister(), kScratchDoubleReg); | 1158         __ debr(i.OutputDoubleRegister(), kScratchDoubleReg); | 
| 1157       } else { | 1159       } else { | 
| 1158         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) | 1160         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0))) | 
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| 1280       break; | 1282       break; | 
| 1281     case kS390_CmpDouble: | 1283     case kS390_CmpDouble: | 
| 1282       __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); | 1284       __ cdbr(i.InputDoubleRegister(0), i.InputDoubleRegister(1)); | 
| 1283       break; | 1285       break; | 
| 1284     case kS390_Tst32: | 1286     case kS390_Tst32: | 
| 1285       if (HasRegisterInput(instr, 1)) { | 1287       if (HasRegisterInput(instr, 1)) { | 
| 1286         __ AndP(r0, i.InputRegister(0), i.InputRegister(1)); | 1288         __ AndP(r0, i.InputRegister(0), i.InputRegister(1)); | 
| 1287       } else { | 1289       } else { | 
| 1288         __ AndP(r0, i.InputRegister(0), i.InputImmediate(1)); | 1290         __ AndP(r0, i.InputRegister(0), i.InputImmediate(1)); | 
| 1289       } | 1291       } | 
| 1290 #if V8_TARGET_ARCH_S390X | 1292       __ LoadAndTestP_ExtendSrc(r0, r0); | 
| 1291       // TODO(john.yan): use ltgfr here. |  | 
| 1292       __ lgfr(r0, r0); |  | 
| 1293       __ LoadAndTestP(r0, r0); |  | 
| 1294 #endif |  | 
| 1295       break; | 1293       break; | 
| 1296 #if V8_TARGET_ARCH_S390X | 1294 #if V8_TARGET_ARCH_S390X | 
| 1297     case kS390_Tst64: | 1295     case kS390_Tst64: | 
| 1298       if (HasRegisterInput(instr, 1)) { | 1296       if (HasRegisterInput(instr, 1)) { | 
| 1299         __ AndP(r0, i.InputRegister(0), i.InputRegister(1)); | 1297         __ AndP(r0, i.InputRegister(0), i.InputRegister(1)); | 
| 1300       } else { | 1298       } else { | 
| 1301         __ AndP(r0, i.InputRegister(0), i.InputImmediate(1)); | 1299         __ AndP(r0, i.InputRegister(0), i.InputImmediate(1)); | 
| 1302       } | 1300       } | 
| 1303       break; | 1301       break; | 
| 1304 #endif | 1302 #endif | 
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| 2123       padding_size -= 2; | 2121       padding_size -= 2; | 
| 2124     } | 2122     } | 
| 2125   } | 2123   } | 
| 2126 } | 2124 } | 
| 2127 | 2125 | 
| 2128 #undef __ | 2126 #undef __ | 
| 2129 | 2127 | 
| 2130 }  // namespace compiler | 2128 }  // namespace compiler | 
| 2131 }  // namespace internal | 2129 }  // namespace internal | 
| 2132 }  // namespace v8 | 2130 }  // namespace v8 | 
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