S390X: Prevent upper 32bit corruption in 32bit ops

src/compiler/s390/code-generator-s390.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/ast/scopes.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
@@ skipping 790 matching lines @@
       break;
     case kS390_OrComplement:
       __ NotP(i.InputRegister(1));
       __ OrP(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
       break;
     case kS390_Xor:
       ASSEMBLE_BINOP(XorP, XorP);
       break;
     case kS390_ShiftLeft32:
       if (HasRegisterInput(instr, 1)) {
-        if (i.OutputRegister().is(i.InputRegister(1))) {
+        if (i.OutputRegister().is(i.InputRegister(1)) &&

[JoranSiu, 2016/05/02 18:22:22]

ShiftLeft masm shoudl really handle all of these cases.  It at least has a check
for DISTINCT_OPS.  Can we fix it there instead?

+            !CpuFeatures::IsSupported(DISTINCT_OPS)) {
           __ LoadRR(kScratchReg, i.InputRegister(1));
           __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg);
         } else {
           ASSEMBLE_BINOP(ShiftLeft, ShiftLeft);
         }
       } else {
         ASSEMBLE_BINOP(ShiftLeft, ShiftLeft);
       }
 #if V8_TARGET_ARCH_S390X
       __ lgfr(i.OutputRegister(0), i.OutputRegister(0));
 #endif
       break;
 #if V8_TARGET_ARCH_S390X
     case kS390_ShiftLeft64:
       ASSEMBLE_BINOP(sllg, sllg);
       break;
 #endif
     case kS390_ShiftRight32:
       if (HasRegisterInput(instr, 1)) {
-        if (i.OutputRegister().is(i.InputRegister(1))) {
+        if (i.OutputRegister().is(i.InputRegister(1)) &&
+            !CpuFeatures::IsSupported(DISTINCT_OPS)) {
           __ LoadRR(kScratchReg, i.InputRegister(1));
           __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg);
         } else {
           ASSEMBLE_BINOP(ShiftRight, ShiftRight);
         }
       } else {
         ASSEMBLE_BINOP(ShiftRight, ShiftRight);
       }
 #if V8_TARGET_ARCH_S390X
       __ lgfr(i.OutputRegister(0), i.OutputRegister(0));
 #endif
       break;
 #if V8_TARGET_ARCH_S390X
     case kS390_ShiftRight64:
       ASSEMBLE_BINOP(srlg, srlg);
       break;
 #endif
     case kS390_ShiftRightArith32:
       if (HasRegisterInput(instr, 1)) {
-        if (i.OutputRegister().is(i.InputRegister(1))) {
+        if (i.OutputRegister().is(i.InputRegister(1)) &&
+            !CpuFeatures::IsSupported(DISTINCT_OPS)) {
           __ LoadRR(kScratchReg, i.InputRegister(1));
           __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0),
                              kScratchReg);
         } else {
           ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith);
         }
       } else {
         ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith);
       }
+#if V8_TARGET_ARCH_S390X
+      __ lgfr(i.OutputRegister(), i.OutputRegister());
+#endif
       break;
 #if V8_TARGET_ARCH_S390X
     case kS390_ShiftRightArith64:
       ASSEMBLE_BINOP(srag, srag);
       break;
 #endif
 #if !V8_TARGET_ARCH_S390X
     case kS390_AddPair:
       // i.InputRegister(0) ... left low word.
       // i.InputRegister(1) ... left high word.
@@ skipping 215 matching lines @@
       break;
     case kS390_Mul32:
 #if V8_TARGET_ARCH_S390X
     case kS390_Mul64:
 #endif
       __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
       break;
     case kS390_MulHigh32:
       __ LoadRR(r1, i.InputRegister(0));
       __ mr_z(r0, i.InputRegister(1));
+#if V8_TARGET_ARCH_S390X

[JoranSiu, 2016/05/02 18:22:22]

We should introduce a Load_ExtendSrc() in masm so we don't have so many #if
S390X's sprinkled through our code.

+      __ lgfr(i.OutputRegister(), r0);
+#else
       __ LoadRR(i.OutputRegister(), r0);
+#endif
       break;
     case kS390_MulHighU32:
       __ LoadRR(r1, i.InputRegister(0));
       __ mlr(r0, i.InputRegister(1));
+#if V8_TARGET_ARCH_S390X
+      __ lgfr(i.OutputRegister(), r0);
+#else
       __ LoadRR(i.OutputRegister(), r0);
+#endif
       break;
     case kS390_MulFloat:
       // Ensure we don't clobber right
       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
         ASSEMBLE_FLOAT_UNOP(meebr);
       } else {
         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
           __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
         __ meebr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
       }
@@ skipping 12 matching lines @@
     case kS390_Div64:
       __ LoadRR(r1, i.InputRegister(0));
       __ dsgr(r0, i.InputRegister(1));  // R1: Dividend
       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output
       break;
 #endif
     case kS390_Div32:
       __ LoadRR(r0, i.InputRegister(0));
       __ srda(r0, Operand(32));
       __ dr(r0, i.InputRegister(1));
-      __ ltr(i.OutputRegister(), r1);
+#if V8_TARGET_ARCH_S390X

[JoranSiu, 2016/05/02 18:22:22]

I believe this is the same as : LoadAndTestP_ExtendSrc

+      __ ltgfr(i.OutputRegister(), r1);  // Copy R1: Quotient to output
+#else
+      __ ltr(i.OutputRegister(), r1);  // Copy R1: Quotient to output
+#endif
       break;
 #if V8_TARGET_ARCH_S390X
     case kS390_DivU64:
       __ LoadRR(r1, i.InputRegister(0));
       __ LoadImmP(r0, Operand::Zero());
       __ dlgr(r0, i.InputRegister(1));  // R0:R1: Dividend
       __ ltgr(i.OutputRegister(), r1);  // Copy R1: Quotient to output
       break;
 #endif
     case kS390_DivU32:
       __ LoadRR(r0, i.InputRegister(0));
       __ srdl(r0, Operand(32));
       __ dlr(r0, i.InputRegister(1));  // R0:R1: Dividend
+#if V8_TARGET_ARCH_S390X
+      __ ltgfr(i.OutputRegister(), r1);
+#else
       __ ltr(i.OutputRegister(), r1);  // Copy R1: Quotient to output
+#endif
       break;
 
     case kS390_DivFloat:
       // InputDoubleRegister(1)=InputDoubleRegister(0)/InputDoubleRegister(1)
       if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
         __ ldr(kScratchDoubleReg, i.InputDoubleRegister(1));
         __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
         __ debr(i.OutputDoubleRegister(), kScratchDoubleReg);
       } else {
         if (!i.OutputDoubleRegister().is(i.InputDoubleRegister(0)))
@@ skipping 964 matching lines @@
       padding_size -= 2;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8