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Side by Side Diff: src/compiler/x64/instruction-codes-x64.h

Issue 1938213002: [Atomics] Make Atomics.store a builtin using TF (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: merge again Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 123 matching lines...) Expand 10 before | Expand all | Expand 10 after
134 V(X64BitcastFI) \ 134 V(X64BitcastFI) \
135 V(X64BitcastDL) \ 135 V(X64BitcastDL) \
136 V(X64BitcastIF) \ 136 V(X64BitcastIF) \
137 V(X64BitcastLD) \ 137 V(X64BitcastLD) \
138 V(X64Lea32) \ 138 V(X64Lea32) \
139 V(X64Lea) \ 139 V(X64Lea) \
140 V(X64Dec32) \ 140 V(X64Dec32) \
141 V(X64Inc32) \ 141 V(X64Inc32) \
142 V(X64Push) \ 142 V(X64Push) \
143 V(X64Poke) \ 143 V(X64Poke) \
144 V(X64StackCheck) 144 V(X64StackCheck) \
145 V(X64Xchgb) \
146 V(X64Xchgw) \
147 V(X64Xchgl)
145 148
146 // Addressing modes represent the "shape" of inputs to an instruction. 149 // Addressing modes represent the "shape" of inputs to an instruction.
147 // Many instructions support multiple addressing modes. Addressing modes 150 // Many instructions support multiple addressing modes. Addressing modes
148 // are encoded into the InstructionCode of the instruction and tell the 151 // are encoded into the InstructionCode of the instruction and tell the
149 // code generator after register allocation which assembler method to call. 152 // code generator after register allocation which assembler method to call.
150 // 153 //
151 // We use the following local notation for addressing modes: 154 // We use the following local notation for addressing modes:
152 // 155 //
153 // M = memory operand 156 // M = memory operand
154 // R = base register 157 // R = base register
(...skipping 18 matching lines...) Expand all
173 V(M1I) /* [ %r2*1 + K] */ \ 176 V(M1I) /* [ %r2*1 + K] */ \
174 V(M2I) /* [ %r2*2 + K] */ \ 177 V(M2I) /* [ %r2*2 + K] */ \
175 V(M4I) /* [ %r2*4 + K] */ \ 178 V(M4I) /* [ %r2*4 + K] */ \
176 V(M8I) /* [ %r2*8 + K] */ 179 V(M8I) /* [ %r2*8 + K] */
177 180
178 } // namespace compiler 181 } // namespace compiler
179 } // namespace internal 182 } // namespace internal
180 } // namespace v8 183 } // namespace v8
181 184
182 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 185 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
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